UC3844, 45 UC2844, 45
Figure 24. MOSFET Parasitic Oscillations
VCC
7(12)
+
–
Vin
+
0
+
–
7(11)
Rg
T
–
+
Q
R
Comp/Latch
S
6(10)
5(8)
3(5)
RS
Series gate resistor Rg will damp any high frequency parasitic oscillations
caused by the MOSFET input capacitance and any series wiring inductance
in the gate–source circuit.
Q1
Q1
6(1)
5(8)
3(5)
RS
The totem–pole output can furnish negative base current for enhanced
transistor turn–off, with the addition of capacitor C1.
–
Base Charge
Removal
C1
Figure 25. Bipolar Transistor Drive
IB
Vin
5.0Vref
+
–
+
–
Figure 26. Isolated MOSFET Drive
VCC
7(12)
+
–
Isolation
Boundary
Q1
+
0
–
VGS Waveforms
+
0
–
Vin
Figure 27. Latched Shutdown
8(14)
R
Bias
R
Osc
5.0Vref
+
–
T
–
+
+
–
+
–
7(11)
6(10)
5(8)
S
Q
R
Comp/Latch
Ipk =
R
NS
3(5) C
RS
Np
Figure 28. Error Amplifier Compensation
From VO
Ri
Rd
CI
2(3)
Rf
1(1)
Rf
≥
8.8 k
5(9)
2.5V
+
–
EA
+
1.0mA
2R
R
Error Amp compensation circuit for stabilizing any current–mode topology except
for boost and flyback converters operating with continuous inductor current.
MOTOROLA ANALOG IC DEVICE DATA
ÉÉ É
ÉÉ ÉÉ
É É
50% DC
25% DC
NP
NS
V(pin 1) – 1.4
3 RS
MCR
101
2N
3905
From VO
Rp
Cp
Ri
Rd
CI
2(3)
Rf
1(1)
4(7)
+
–
2(3)
1(1)
EA
+
1.0mA
2R
R
5(9)
2N
3903
The MCR101 SCR must be selected for a holding of less than 0.5 mA at
TA(min). The simple two transistor circuit can be used in place of the SCR as
shown. All resistors are 10 k.
2.5V
+
–
EA
+
1.0mA
2R
R
5(9)
Error Amp compensation circuit for stabilizing current–mode boost and flyback
topologies operating with continuous inductor current.
11
ONSEMI [ ON SEMICONDUCTOR ]
