UC3842A, 43A UC2842A, 43A
Figure 26. Current Waveform Spike Suppression
Figure 27. MOSFET Parasitic Oscillations
V
V
CC
CC
V
V
in
in
7(12)
7(12)
+
–
+
–
5.0V
ref
5.0V
ref
+
+
–
+
–
+
–
–
+
+
7(11)
6(10)
5(8)
7(11)
6(10)
5(8)
R
–
Q1
g
–
Q1
S
R
S
R
Q
–
Q
–
+
+
Comp/Latch
R
Comp/Latch
3(5)
3(5)
R
C
R
S
S
Series gate resistor R will damp any high frequency parasitic oscillations
g
causedbytheMOSFETinputcapacitanceandanyserieswiringinductance
in the gate–source circuit.
The addition of the RC filter will eliminate instability caused by the leading
edge spike on the current waveform.
Figure 28. Bipolar Transistor Drive
Figure 29. Isolated MOSFET Drive
I
B
V
in
V
V
CC
in
+
7(12)
0
Base Charge
Removal
+
–
Isolation
Boundary
5.0V
ref
+
–
–
C
1
+
V
Waveforms
GS
–
Q1
+
7(11)
6(1)
5(8)
+
0
–
+
0
–
Q1
–
6(1)
50% DC
V
25% DC
S
R
– 1.4
N
N
(pin 1)
P
S
Q
–
I
=
5(8)
3(5)
pk
+
3 R
S
R
Comp/Latch
3(5)
C
N
S
R
S
N
p
R
S
The totem–pole output can furnish negative base current for enhanced
transistor turn–off, with the addition of capacitor C .
1
Figure 30. Latched Shutdown
Figure 31. Error Amplifier Compensation
From V
O
2.5V
+
R
1.0mA
2R
i
2(3)
+
8(14)
R
R
–
Bias
EA
R
C
I
d
R
f
R
1(1)
Osc
5(9)
+
4(7)
1.0mA
2R
+
–
ErrorAmpcompensationcircuitforstabilizinganycurrent–modetopologyexcept
for boost and flyback converters operating with continuous inductor current.
EA
2(3)
1(1)
R
From V
O
2.5V
+
2N
3905
5(9)
MCR
101
1.0mA
2R
R
p
2(3)
R
+
–
i
2N
3903
EA
C
R
I
R
d
f
R
C
p
1(1)
5(9)
The MCR101 SCR must be selected for a holding of less than 0.5 mA at
. The simple two transistor circuit can be used in place of the SCR as
T
A(min)
shown. All resistors are 10 k.
Error Amp compensation circuit for stabilizing current–mode boost and flyback
topologies operating with continuous inductor current.
12
MOTOROLA ANALOG IC DEVICE DATA
ONSEMI [ ONSEMI ]
