NBSG72A
Exposed Pad (EP)
V
Q0
15
Q0 OLS
14 13
CC
16
V
1
2
3
4
12
11
10
9
V
TD0
D0
D0
CC
Q1
NBSG72A
Q1
SELA
SELB
5
6
7
8
V
EE
D1
D1
V
TD1
Figure 1. QFN−16 Pinout (Top View)
Table 1. PIN DESCRIPTION
Pin No.
Name
VTD0
D0
I/O
Description
1
2
−
Common Internal 50 W Termination Pin for D0 and D0 Input. See Table 4. (Note 1)
LVDS, CML, ECL,
LVTTL, LVCMOS
Input
Inverted Differential Input 0.
3
D0
LVDS, CML, ECL,
LVTTL, LVCMOS
Input
Noninverted Differential Input 0.
4
5
6
SELA
LVECL, LVCMOS
Input
Select Logic Input A. Internal 75 kW Pulldown to V
.
EE
V
EE
−
Negative Supply. All V Pins must be Externally Connected to Power Supply to
EE
Guarantee Proper Operation.
D1
D1
LVDS, CML, ECL,
LVTTL, LVCMOS
Input
Inverted Differential Input 1.
7
LVDS, CML, ECL,
LVTTL, LVCMOS
Input
Noninverted Differential Input 1.
8
9
VTD1
SELB
−
Common Internal 50 W Termination Pin for D1 and D1 Input. See Table 4. (Note 1)
LVECL, LVCMOS
Input
Select Logic Input B. Internal 75 kW Pulldown to V
.
EE
10
11
12
Q1
Q1
RSECL Output
RSECL Output
−
Noninverted Differential Output.
Inverted Differential Output.
V
CC
Positive Supply. All V Pins must be Externally Connected to Power Supply to
CC
Guarantee Proper Operation.
13
14
15
16
−
OLS
(Note 2)
Input
Input Pin for Output Level Select (OLS) See Table 3.
Q0
Q0
RSECL Output
Noninverted Differential Output Typically Terminated with 50 W Resistor to
V
TT
= V − 2.0 V.
CC
RSECL Output
Inverted Differential Output Typically Terminated with 50 W Resistor to
= V − 2.0 V.
V
TT
CC
V
CC
−
−
Positive Supply. All V Pins must be Externally Connected to Power Supply to
CC
Guarantee Proper Operation.
EP
Exposed Pad. The thermally exposed pad on package bottom (see case drawing)
must be attached to a heat−sinking conduit.
1. In the differential configuration when the input termination pins (VTD0, VTD1) are connected to a common termination voltage, and if no signal
is applied then the device will be susceptible to self−oscillation.
2. When an output level of 400 mV is desired and V − V > 3.0 V, 2 kW resistor should be connected from OLS pin to V .
CC
EE
EE
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