MC33201, MC33202, MC33204, NCV33202, NCV33204
DETAILED OPERATING DESCRIPTION
General Information
Circuit Information
The MC33201/2/4 family of operational amplifiers are
unique in their ability to swing rail−to−rail on both the input
and the output with a completely bipolar design. This offers
low noise, high output current capability and a wide
common mode input voltage range even with low supply
voltages. Operation is guaranteed over an extended
temperature range and at supply voltages of 2.0 V, 3.3 V and
5.0 V and ground.
Rail−to−rail performance is achieved at the input of the
amplifiers by using parallel NPN−PNP differential input
stages. When the inputs are within 800 mV of the negative
rail, the PNP stage is on. When the inputs are more than 800
mV greater than V , the NPN stage is on. This switching of
EE
input pairs will cause a reversal of input bias currents (see
Figure 6). Also, slight differences in offset voltage may be
noted between the NPN and PNP pairs. Cross−coupling
techniques have been used to keep this change to a minimum.
In addition to its rail−to−rail performance, the output stage
is current boosted to provide 80 mA of output current,
enabling the op amp to drive 600 W loads. Because of this
high output current capability, care should be taken not to
exceed the 150°C maximum junction temperature.
Since the common mode input voltage range extends from
V
CC
to V , it can be operated with either single or split
EE
voltage supplies. The MC33201/2/4 are guaranteed not to
latch or phase reverse over the entire common mode range,
however, the inputs should not be allowed to exceed
maximum ratings.
V
V
= +ꢀ6.0 V
= −ꢀ6.0 V
V
V
= +ꢀ6.0 V
= −ꢀ6.0 V
CC
CC
EE
EE
R = 600 W
L
C = 100 pF
R = 600 W
L
C = 100 pF
L
L
T = 25°C
A
T = 25°C
A
t, TIME (5.0 ms/DIV)
t, TIME (10 ms/DIV)
Figure 26. Noninverting Amplifier Slew Rate
Figure 27. Small Signal Transient Response
V
CC
V
EE
= +ꢀ6.0 V
= −ꢀ6.0 V
R = 600 W
L
C = 100 pF
L
A = 1.0
V
T = 25°C
A
t, TIME (10 ms/DIV)
Figure 28. Large Signal Transient Response
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must be
the correct size to ensure proper solder connection interface
between the board and the package. With the correct pad
geometry, the packages will self−align when subjected to a
solder reflow process.
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