MC33201, MC33202, MC33204, NCV33202, NCV33204
2500
2000
1500
1000
500
40
35
30
360 amplifiers tested from
3 (MC33204) wafer lots
ꢁV = +ꢀ5.0 V
ꢁV = Gnd
EE
ꢁT = 25°C
A
ꢁDIP Package
8 and 14 Pin DIP Pkg
CC
TSSOP−14 Pkg
25
SO−14 Pkg
20
15
10
5.0
0
SOIC−8
Pkg
0
−ꢀ55 −ꢀ40 −ꢀ25
0
25
50
85
125
−10 −ꢀ8.0 −ꢀ6.0 −ꢀ4.0 −ꢀ2.0
0
2.0 4.0 6.0 8.0
10
T , AMBIENT TEMPERATURE (°C)
A
V , INPUT OFFSET VOLTAGE (mV)
IO
Figure 2. Maximum Power Dissipation
versus Temperature
Figure 3. Input Offset Voltage Distribution
50
40
30
20
200
160
120
80
V
V
= +ꢀ5.0 V
= Gnd
360 amplifiers tested from
3 (MC33204) wafer lots
ꢁV = +ꢀ5.0 V
ꢁV = Gnd
EE
ꢁT = 25°C
A
ꢁDIP Package
CC
EE
CC
V
CM
= 0 V to 0.5 V
V
CM
> 1.0 V
10
0
40
0
−ꢀ55
−ꢀ40 −ꢀ25
0
25
70
85
125
−ꢀ50 −ꢀ40 −ꢀ30 −ꢀ20 −10
0
10
20
30
40
50
m
°
, INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT ( V/ C)
TC
V
IO
T , AMBIENT TEMPERATURE (°C)
A
Figure 4. Input Offset Voltage
Temperature Coefficient Distribution
Figure 5. Input Bias Current
versus Temperature
150
100
300
260
50
0
220
180
140
100
−ꢀ50
−100
−150
−ꢀ200
−ꢀ250
V
V
= +ꢀ5.0 V
= Gnd
CC
V
V
= 12 V
= Gnd
CC
EE
EE
R = 600 W
L
DV = 0.5 V to 4.5 V
T = 25°C
A
O
0
2.0
V
4.0
6.0
8.0
10
12
−ꢀ55 −ꢀ40 −ꢀ25
0
25
70
85
105 125
, INPUT COMMON MODE VOLTAGE (V)
T , AMBIENT TEMPERATURE (°C)
CM
A
Figure 6. Input Bias Current
versus Common Mode Voltage
Figure 7. Open Loop Voltage Gain versus
Temperature
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