MC100LVEL01
Table 1. PIN DESCRIPTION
V
8
7
CC
D
D
1
2
0
1
PIN
FUNCTION
D0−D3
ECL Data Inputs
ECL Data Outputs
Positive Supply
Negative Supply
Q
Q, Q
V
CC
V
EE
6
5
D
D
3
4
EP
Exposed pad must be con-
nected to a sufficient thermal
conduit. Electrically connect to
the most negative supply or
leave floating open.
Q
V
2
3
EE
Figure 1. Logic Diagram and Pinout Assignment
Table 2. MAXIMUM RATINGS
Symbol
Parameter
PECL Mode Power Supply
NECL Mode Power Supply
Condition 1
= 0 V
Condition 2
Rating
8 to 0
Units
V
CC
V
EE
V
I
V
V
V
V
EE
= 0 V
−8 to 0
CC
PECL Mode Input Voltage
NECL Mode Input Voltage
V
V
= 0 V
= 0 V
V ꢀ V
6 to 0
−6 to 0
V
V
EE
I
CC
V ꢁ V
CC
I
EE
I
Output Current
Continuous
Surge
50
100
mA
mA
out
T
Operating Temperature Range
−40 to +85
°C
°C
A
T
Storage Temperature Range
−65 to +150
stg
JA
q
Thermal Resistance (Junction to Ambient)
0 lfpm
500 lfpm
8 SOIC
8 SOIC
190
130
°C/W
°C/W
q
q
Thermal Resistance (Junction to Case)
Thermal Resistance (Junction to Ambient)
Standard Board
8 SOIC
41 to 44 ± 5%
°C/W
JC
JA
0 lfpm
500 lfpm
8 TSSOP
8 TSSOP
185
140
°C/W
°C/W
q
q
Thermal Resistance (Junction to Case)
Standard Board
8 TSSOP
41 to 44 ± 5%
°C/W
JC
JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
DFN8
DFN8
129
84
°C/W
°C/W
T
sol
Wave Solder
Pb <2 to 3 sec @ 248°C
Pb−Free <2 to 3 sec @ 260°C
265
265
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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