ADT7460
ADT7460 Address Selection
Pin 8 is the dual−function PWM3/ADDRESS ENABLE
pin. If Pin 8 is pulled low on powerup, the ADT7460 reads
the state of Pin 9 (TACH4/ADDRESS SELECT/THERM)
to determine the ADT7460’s slave address. If Pin 8 is high
on powerup, the ADT7460 defaults to SMBus Slave
Table 1. Summary Internal Registers
Register
Configuration
Address Pointer
Status Registers
Address 0x2E. This function is described in more detail
later.
Internal Registers of the ADT7460
Table 1 summarizes the ADT7460’s principal internal
registers. Table 38 to Table 78 describe the registers in more
detail.
Description
These registers provide control and configuration of the ADT7460, including alternate pinout functionality.
This register contains the address that selects one of the other internal registers. When writing to the
ADT7460, the first byte of data is always a register address, which is written to the address pointer register.
These registers provide the status of each limit comparison and are used to signal out−of−limit conditions on
the temperature, voltage, or fan speed channels. If Pin 14 or Pin 5 is configured as SMBALERT, this pin
asserts low whenever an unmasked status bit is set.
These registers allow each interrupt status event to be masked when Pin 14 or Pin 5 is configured as an
SMBALERT output.
The results of analog voltage input, temperature, and fan speed measurements are stored in these
registers, along with their limit values.
These registers allow each temperature channel reading to be offset by a twos complement value written to
these registers.
These registers program the starting temperature for each fan under automatic fan speed control.
These registers program the temperature−to−fan speed control slope in automatic fan speed control mode
for each PWM output.
These registers define the target operating temperatures for each thermal zone when running under
dynamic T
MIN
control. This function allows the cooling solution to adjust dynamically in response to
measured temperature and system performance.
These registers allow each PWM output controlling fan to be tweaked to enhance the system’s acoustics.
Interrupt Mask
Value and Limit
Offset
T
MIN
T
RANGE
Operating Point
Enhance Acoustics
Theory of Operation
Serial Bus Interface
Table 2. Address Select Mode
Pin 8
State
0
0
1
Pin 9 State
Low (10 kW to GND)
High (10 kW pullup)
Don’t Care
Address
0101100 (0x2C)
0101101 (0x2D)
0101110 (0x2E) (default)
Control of the ADT7460 is carried out using the serial
System Management Bus (SMBus). The ADT7460 is
connected to this bus as a slave device, under the control of
a master controller.
The ADT7460 has a 7−bit serial bus address. When the
device is powered up with Pin 8 (PWM3/ ADDRESS
ENABLE) high, the ADT7460 has a default SMBus address
of 0101110 or 0x2E. If more than one ADT7460 is to be used
in a system, each ADT7460 should be placed in address
select mode by strapping Pin 8 low on powerup. The logic
state of Pin 9 then determines the device’s SMBus address.
The logic state of these pins is sampled on powerup.
The device address is sampled and latched on the first
valid SMBus transaction, more precisely, on the
low−to−high transition at the beginning of the eighth SCL
pulse, when the serial address byte matches the selected
slave address. The selected slave address is chosen using the
ADDRESS ENABLE/ADDRESS SELECT pins. Any
attempted changes in the address has no effect after this.
ADT7460
ADDR_SEL
9
V
CC
10kΩ
8
PWM3/ADDR_EN
ADDRESS = 0x2E
Figure 13. Default SMBus Address 0x2E
ADT7460
ADDR_SEL
9
10kΩ
PWM3/ADDR_EN
8
ADDRESS = 0x2C
Figure 14. SMBus Address 0x2C (Pin 9 = 0)
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