ADM1032
Serial Bus Interface
Table 7. Consecutive ALERT Register Codes
Control of the ADM1032 is carried out via the serial bus.
The ADM1032 is connected to this bus as a slave device,
under the control of a master device.
There is a programmable SMBus timeout. When this is
enabled, the SMBus times out after typically 25 ms of no
activity. However, this feature is not enabled by default. To
enable it, set Bit 7 of the consecutive alert register
(Address = 22h).
Register Value
Number of Out−of−Limit
Measurements Required
yxxx 000x
yxxx 001x
yxxx 011x
yxxx 111x
1
2
3
4
NOTE: x = don’t care bits, and y = SMBus timeout bit.
Default = 0. See SMBus section for more information.
Table 8. List of ADM1032 Registers
Read Address (Hex)
Write Address (Hex)
Name
Power−On Default
Undefined
Not Applicable
Not Applicable
Address Pointer
00
Not Applicable
Local Temperature Value
0000 0000 (00h)
01
Not Applicable
External Temperature Value High Byte
Status
0000 0000 (00h)
02
Not Applicable
Undefined
03
09
Configuration
0000 0000 (00h)
04
0A
Conversion Rate
0000 1000 (08h)
05
0B
Local Temperature High Limit
Local Temperature Low Limit
External Temperature High Limit High Byte
External Temperature Low Limit High Byte
One−Shot
0101 0101 (55h) (85°C)
0000 0000 (00h) (0°C)
0101 0101 (55h) (85°C)
0000 0000 (00h) (0°C)
06
0C
07
0D
08
0E
Not Applicable
0F
10
11
12
13
14
19
Not Applicable
External Temperature Value Low Byte
External Temperature Offset High Byte
External Temperature Offset Low Byte
External Temperature High Limit Low Byte
External Temperature Low Limit Low Byte
External THERM Limit
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
11
12
13
14
19
0101 0101 (55h) (85°C) (ADM1032)
0110 1100 (6Ch) (108°C)
(ADM1032−1)
20
21
22
FE
FF
20
Local THERM Limit
THERM Hysteresis
Consecutive ALERT
Manufacturer ID
0101 0101 (55h) (85°C)
0000 1010 (0Ah) (10°C)
0000 0001 (01h)
21
22
Not Applicable
Not Applicable
0100 0001 (41h)
Die Revision Code
Undefined
NOTE: Writing to Address 0F causes the ADM1032 to perform a single measurement. It is not a data register as such and it does not
matter what data is written to it.
Addressing the Device
The serial bus protocol operates as follows:
1. The master initiates data transfer by establishing a
START condition, defined as a high−to−low
transition on the serial data line SDATA, while the
serial clock line SCLK remains high. This
In general, every SMBus device has a 7−bit device address
(except for some devices that have extended, 10−bit
addresses). When the master device sends a device address
over the bus, the slave device with that address responds.
The ADM1032 and the ADM1032−1 are available with one
SMBus address, which is Hex 4C (1001 100). The
ADM1032−2 is also available with one SMBus address;
however, that address is Hex 4D (1001 101).
indicates that an address/data stream follows. All
slave peripherals connected to the serial bus
respond to the START condition and shift in the
next eight bits, consisting of a 7−bit address (MSB
first) plus an R/W bit, which determines the
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