74HC08
DC CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
V
CC
Symbol
Parameter
Condition
−55 to 25°C ≤85°C ≤125°C Unit
(V)
V
Minimum High−Level Input Voltage
V
= 0.1V or V −0.1V
2.0
3.0
4.5
6.0
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
V
V
V
IH
out
CC
|I | ≤ 20mA
out
V
Maximum Low−Level Input Voltage
Minimum High−Level Output Voltage
V
out
= 0.1V or V − 0.1V
2.0
3.0
4.5
6.0
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
IL
CC
|I | ≤ 20mA
out
V
V
in
= V or V
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
OH
IH
IL
IL
IL
IL
|I | ≤ 20mA
out
V
in
=V or V
|I | ≤ 2.4mA
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.20
3.70
5.20
IH
out
|I | ≤ 4.0mA
out
|I | ≤ 5.2mA
out
V
Maximum Low−Level Output Voltage
V
in
= V or V
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
OL
IH
|I | ≤ 20mA
out
V
in
= V or V
|I | ≤ 2.4mA
3.0
4.5
6.0
0.26
0.26
0.26
0.33
0.33
0.33
0.40
0.40
0.40
IH
out
|I | ≤ 4.0mA
out
|I | ≤ 5.2mA
out
I
Maximum Input Leakage Current
V
V
= V or GND
6.0
6.0
±0.1
±1.0
±1.0
mA
mA
in
in
CC
I
Maximum Quiescent Supply
Current (per Package)
= V or GND
2.0
20
40
CC
in
CC
I
= 0mA
out
NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).
AC CHARACTERISTICS (C = 50pF, Input t = t = 6ns)
L
r
f
Guaranteed Limit
V
CC
Symbol
Parameter
−55 to 25°C ≤85°C ≤125°C Unit
(V)
t
t
,
Maximum Propagation Delay, Input A or B to Output Y
(Figures 1 and 2)
2.0
3.0
4.5
6.0
75
30
15
13
95
40
19
16
110
55
22
ns
ns
pF
PLH
PHL
19
t
t
,
Maximum Output Transition Time, Any Output
(Figures 1 and 2)
2.0
3.0
4.5
6.0
75
27
15
13
95
32
19
16
110
36
22
TLH
THL
19
C
in
Maximum Input Capacitance
10
10
10
NOTE:For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON
Semiconductor High−Speed CMOS Data Book (DL129/D).
Typical @ 25°C, V = 5.0 V, V = 0 V
CC
EE
20
C
PD
Power Dissipation Capacitance (Per Buffer)*
pF
2
* Used to determine the no−load dynamic power consumption: P = C
V
f + I
V
. For load considerations, see Chapter 2 of the
D
PD CC
CC CC
ON Semiconductor High−Speed CMOS Data Book (DL129/D).
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