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0W344-004-XTP 参数 Datasheet PDF下载

0W344-004-XTP图片预览
型号: 0W344-004-XTP
PDF下载: 下载PDF文件 查看货源
内容描述: 1.0 GENRAL说明 [1.0 Genral Description]
分类和应用: 微控制器和处理器外围集成电路数字信号处理器时钟
文件页数/大小: 43 页 / 1433 K
品牌: ONSEMI [ ONSEMI ]
 浏览型号0W344-004-XTP的Datasheet PDF文件第24页浏览型号0W344-004-XTP的Datasheet PDF文件第25页浏览型号0W344-004-XTP的Datasheet PDF文件第26页浏览型号0W344-004-XTP的Datasheet PDF文件第27页浏览型号0W344-004-XTP的Datasheet PDF文件第29页浏览型号0W344-004-XTP的Datasheet PDF文件第30页浏览型号0W344-004-XTP的Datasheet PDF文件第31页浏览型号0W344-004-XTP的Datasheet PDF文件第32页  
BelaSigna 200  
10.0 Boot Sequence  
BelaSigna 200 boots in a two-stage boot sequence. The ProgramROM begins loading the bootloader from an external SPI EEPROM  
200ms after power is applied to the chip. In this process the ProgramROM checks the EEPROM file structure to ensure validity. If the  
file structure is validated, the bootloader is written to PRAM. In case of an error while reading the external EEPROM, all outputs are  
muted. The system will then reset due to a watchdog timeout.  
Once the bootloader is loaded into PRAM the program counter is set to point to the beginning of the bootloader code. Subsequently,  
the signal-processing application that is stored in the EEPROM is downloaded to PRAM by the bootloader. The boot process generally  
takes less than one second. ON Semiconductor provides a standard full-featured bootloader.  
An alternative to bootloading is often used in development - program code can be loaded through the debug port after powering  
BelaSigna 200. In this case, an SPI EEPROM may or may not be attached, and the debug port takes over control of the system. Some  
products use this technique when an EEPROM is not suitable to the application.  
Rev. 16 | Page 28 of 43 | www.onsemi.com  
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