NCP729
IN
EN
BANDGAP
REFERENCE
ENABLE
LOGIC
UVLO
THERMAL
SHUTDOWN
MOSFET
DRIVER WITH
CURRENT LIMIT
AUTO LOW
POWER MODE
OUT
ACTIVE
DISCHARGE
EEPROM
GND
EN
Figure 2. Simplified Schematic Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
4−bump CSP
B2
B1
A1
A2
Pin Name
OUT
GND
EN
IN
Description
Regulated output voltage pin. A small 1
mF
ceramic capacitor is needed from this pin to ground
to assure stability.
Power supply ground. Soldered to large copper plane allows for better heat dissipation.
Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regu-
lator into shutdown mode.
Input pin. A small capacitor is needed from this pin to ground to assure stability.
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Input Voltage (Note 1)
Output Voltage
Enable Input
Output Short Circuit Duration
Maximum Junction Temperature
Storage Temperature
ESD Capability, Human Body Model (Note 2)
ESD Capability, Machine Model (Note 2)
Symbol
V
IN
V
OUT
V
EN
t
SC
T
J(MAX)
T
STG
ESD
HBM
ESD
MM
Value
−0.3
V to 6 V
−0.3
V to V
IN
+ 0.3 V
−0.3
V to V
IN
+ 0.3 V
∞
125
−55
to 150
2000
200
Unit
V
V
V
s
°C
°C
V
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
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