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0402ZD105KAT2A 参数 Datasheet PDF下载

0402ZD105KAT2A图片预览
型号: 0402ZD105KAT2A
PDF下载: 下载PDF文件 查看货源
内容描述: 200毫安,超低静态电流,超低噪声,低压差线性稳压器 [200 mA, Ultra-Low Quiescent Current, Ultra-Low Noise, LDO Linear Voltage Regulator]
分类和应用: 稳压器
文件页数/大小: 20 页 / 1733 K
品牌: ONSEMI [ ONSEMI ]
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NCV8702  
APPLICATIONS INFORMATION  
Enable Operation  
current measured with the output voltage 100 mV lower than  
The NCV8702 uses the EN pin to enable/disable its output  
and to deactivate/activate the active discharge function.  
If the EN pin voltage is <0.4 V the device is guaranteed to  
be disabled. The pass transistor is turnedoff so that there is  
virtually no current flow between the IN and OUT. The  
active discharge transistor is active so that the output voltage  
the nominal V  
. If the Output Voltage is directly shorted  
= 0 V), the short circuit protection will  
OUT  
to ground (V  
OUT  
limit the output current to 390 mA (typ). The current limit  
and short circuit protection will work properly up to V  
=
IN  
5.5 V at T = 25°C. There is no limitation for the short circuit  
A
duration.  
V
OUT  
is pulled to GND through a 1 kW resistor. In the  
Thermal Shutdown  
When the die temperature exceeds the Thermal Shutdown  
disable state the device consumes as low as typ. 10 nA from  
the V .  
IN  
threshold (T 160°C typical), Thermal Shutdown event  
SD  
If the EN pin voltage >0.9 V the device is guaranteed to  
be enabled. The NCV8702 regulates the output voltage and  
the active discharge transistor is turnedoff.  
The EN pin has internal pulldown current source with  
typ. value of 110 nA which assures that the device is  
turnedoff when the EN pin is not connected. A build in  
2 mV of hysteresis in the EN prevents from periodic on/off  
oscillations that can occur due to noise.  
is detected and the device is disabled. The IC will remain in  
this state until the die temperature decreases below the  
Thermal Shutdown Reset threshold (T  
140°C typical).  
SDU  
Once the IC temperature falls below the 140°C the LDO is  
enabled again. The thermal shutdown feature provides  
protection from a catastrophic device failure due to  
accidental overheating. This protection is not intended to be  
used as a substitute for proper heat sinking.  
In the case where the EN function isn’t required the EN  
pin should be tied directly to IN.  
Power Dissipation  
As power dissipated in the NCV8702 increases, it might  
become necessary to provide some thermal relief. The  
maximum power dissipation supported by the device is  
dependent upon board design and layout. Mounting pad  
configuration on the PCB, the board material, and the  
ambient temperature affect the rate of junction temperature  
rise for the part.  
Undervoltage Lockout  
The internal UVLO circuitry assures that the device  
becomes disabled when the V falls below typ. 1.5 V. When  
IN  
the V voltage rampsup the NCV8702 becomes enabled,  
IN  
if V rises above typ. 1.6 V. The 100 mV hysteresis prevents  
IN  
on/off oscillations that can occur due to noise on V line.  
IN  
Reverse Current  
The PMOS pass transistor has an inherent body diode  
which will be forward biased in the case that V  
Due to this fact in cases where the extended reverse current  
condition is anticipated the device may require additional  
external protection.  
The maximum power dissipation the NCV8702 can  
handle is given by:  
> V .  
OUT  
IN  
ƪT  
ƫ
J(MAX) * TA  
(eq. 1)  
PD(MAX)  
+
qJA  
The power dissipated by the NCV8702 for given  
application conditions can be calculated from the following  
equations:  
Output Current Limit  
Output Current is internally limited within the IC to a  
typical 380 mA. The NCV8702 will source this amount of  
ǒ
Ǔ
ǒV  
Ǔ
(eq. 2)  
P
D [ VIN IGND@IOUT ) IOUT IN * VOUT  
330  
310  
290  
0.65  
0.60  
0.55  
P
, T = 25°C, 2 OZ CU  
A
D(MAX)  
270  
250  
230  
210  
190  
0.50  
0.45  
0.40  
0.35  
0.30  
q
q
, 1 OZ CU  
, 2 OZ CU  
JA  
JA  
P
, T = 25°C, 1 OZ CU  
A
D(MAX)  
170  
150  
0.25  
0.20  
700  
0
100  
200  
300  
400  
500  
600  
2
PCB COPPER AREA (mm )  
Figure 62. qJA and PD(MAX) vs. Copper Area (TSOP5)  
http://onsemi.com  
16  
 
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