Improved Specifications
Section 1-9
The following additions and improvements were made to create the version-2
CPUs.
CMP/CMPL
New versions of the CMP(020) and CMPL(021) have been added that are not
intermediate instructions. The new instructions are CMP(028) and CMPL(029)
and are programs as right-hand (final) instructions. A total of 24 other new com
-
parison instructions have also been added with symbol mnemonics (e.g., >, +,
and <).
XFER(040)
DMPX(111)
New Flags
This instruction has been upgraded so that source and destination areas can
overlap.
This instruction has been upgraded so that either the MSB or the LSB can be
specified for use as the end code. Previously only the the MSB could be used.
Underflow and Overflow Flags have been added at A50009 and A50010, re-
spectively. These flags can be turned ON or OFF when executing ADB, ADBL,
SBB, and SBBL and can be saved or loaded using CCL and CCS.
New Instructions
A total of 125 new instructions have been added. These instructions are sup-
ported by version-2 CPUs only.
Faster Online Editing
The time that operation is stopped for online editing has been reduced and is no
longer added to the cycle time. The following are just a couple of examples.
Edit
Time operation is stopped
Adding or deleting one instruction block at the
beginning of a 62K-word program
Approx. 0.5 s
Deleting an instruction block containing JME
from the beginning of a 62K-word program
Approx. 2.0 s
The above speed increase also applies to all V1 CPUs with lot numbers in which
the rightmost digit is 5 (jjj5) or higher.
New Host Link Commands
New C-mode commands for the CPU Host Interface have been added and the
functionality of existing commands has been improved as follows:
New Commands
• RL/WL: Read and write commands for the CIO Area.
• RH/WH: Read and write commands for the CIO Area.
• CR: Read command for the DM Area.
• R#/R$/R%: SV read commands.
• W#/W$/W%: SV change commands.
• *: Initialization command.
Improved Commands
• The Link Area (CIO 1000 to CIO 1063) and Holding Area (CIO 1200 to
CIO 1299) can now be specified for the KS, KR, KC, and QQ commands.
• CVM1-CPU21-EV2 can now be read for the MM command.
The above new and improved commands can also be used with all V1 CPUs
with lot numbers in which the rightmost digit is 5 (jjj5) or higher.
Note Only the following Programming Devices support version-2 CPUs: SSS
(C500-ZL3AT1-E) and the CVM1-PRS21-EV1 Programming Console
(CVM1-MP201-V1). Of these, the SSS does not support SFC and thus cannot
be used for the CV500, CV1000, and CV2000. Use the CVSS for these PCs.
14
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