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MSM80C40 参数 Datasheet PDF下载

MSM80C40图片预览
型号: MSM80C40
PDF下载: 下载PDF文件 查看货源
内容描述: 8位CMOS微控制器 [CMOS 8-Bit Microcontroller]
分类和应用: 微控制器
文件页数/大小: 20 页 / 149 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
 浏览型号MSM80C40的Datasheet PDF文件第6页浏览型号MSM80C40的Datasheet PDF文件第7页浏览型号MSM80C40的Datasheet PDF文件第8页浏览型号MSM80C40的Datasheet PDF文件第9页浏览型号MSM80C40的Datasheet PDF文件第11页浏览型号MSM80C40的Datasheet PDF文件第12页浏览型号MSM80C40的Datasheet PDF文件第13页浏览型号MSM80C40的Datasheet PDF文件第14页  
¡ Semiconductor  
MSM80C48/49/50, MSM80C35/39/40  
AC Characteristics  
(VCC=2.5V to 6V (*1), Ta=–40 to +85°C)  
V
CC=5 V±±10  
Variable clock  
1 to ±± MHz  
Parameter  
Symbol ±± MHz Clock  
Min. Max.  
Unit  
Min.  
3.5t–170  
2t–110  
t–40  
Max.  
tLL  
tAL  
150  
70  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ms  
ALE Pulse Width  
Address Setup Time (up to ALE)  
Address Hold Time (from ALE)  
Bus Port Latch Data Setup Time (up to ALE Rising Edge)  
Bus Port Latch Data Hold Time (from ALE Rising Edge)  
Control Pulse Width (RD, WR)  
Control Pulse Width (PSEN)  
Data Setup Time (before WR)  
Data Hold after Time (after WR)  
Data Hold Time (after RD, PSEN)  
RD to Data-in  
tLA  
50  
tBL  
110  
90  
2.5t –115  
1.5 t–45  
7t–155  
6t–200  
6t–155  
2t–140  
0
tLB  
tCC1  
tCC2  
tDW  
tWD  
tDR  
480  
350  
390  
40  
0
110  
350  
190  
1.5t–30  
5t–265  
5t–265  
tRD1  
tRD2  
tAW  
tAD1  
tAD2  
tAFC1  
tAFC2  
tLAFC2  
tLAFC1  
tCA1  
tCA2  
tCP  
PSEN to Data-in  
300  
6t–245  
Address Setup to WR  
730  
460  
12t–360  
8t–265  
Address Setup to Data-in  
Address Setup to Instruction  
Address Float to RD, WR  
140  
10  
2t–40  
10  
Address Float to PSEN  
60  
t–30  
Control Pulse Setup Time from ALE (PSEN)  
Control Pulse Setup Time from ALE (RD, WR)  
Control Pulse up to ALE (RD, WR, PROG)  
Control Pulse up to ALE (PSEN)  
Port Control Setup Time (up to PROG Falling Edge)  
Port Control Hold Time (from PROG Falling Edge)  
PROG to Input Data Valid  
200  
50  
3t–75  
1.5t–85  
4.5t–90  
2t–130  
4t–260  
320  
50  
tPC  
100  
tPR  
650  
140  
9t–170  
1.5t  
tPF  
0
0
Input Data Hold Time  
tDP  
250  
40  
6t–290  
3t–230  
10t–210  
4.5–250  
1.5t–120  
Output Data Setup Time  
tPD  
Output Data Hold Time  
tPP  
700  
160  
15  
PROG Pulse Width  
tPL  
Port 2 I/O Setup Time  
tLP  
Port 2 I/O Hold Time  
tPV  
510  
4t+145  
Port Output Data (from ALE)  
T0 Cycle  
tOPRR  
tCY  
270  
1.36  
3t  
15t  
Instruction Execution Time  
Note : Control output : C =80pF  
L
Bus output : C =150pF [for 20 pF (t , t  
, t  
)]  
L
AL AFC1 AFC2  
*1 Minimum operating voltage is dependent on frequency.  
10/20