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ML9212 参数 Datasheet PDF下载

ML9212图片预览
型号: ML9212
PDF下载: 下载PDF文件 查看货源
内容描述: 32位双面/三( 1/2占空比/ 1/3占空比) VF控制器/驱动器与数字调光 [32-Bit Duplex/Triplex (1/2 duty / 1/3 duty) VF Controller/Driver with Digital Dimming]
分类和应用: 驱动器控制器
文件页数/大小: 17 页 / 250 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
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FEDL9212-01
OKI Semiconductor
ML9212
PIN DESCRIPTIONS
Symbol
V
DISP
V
DD
D-GND
L-GND
Pin
43, 56
14
12, 49
21
30 to 42,
44 to 48,
50 to 53
Type
Description
Power supply pins for VFD driver circuit.
43 pin and 56 pin should be connected externally.
Power supply pin for logic drive.
D-GND is ground pin for the VFD driver circuit. L-GND is ground pin
for the logic circuit. 12 pin, 21 pin and 49 pin should be connected
externally.
Segment (anode) signal output pins for a VFD tube.
These pins can be directly connected to the VFD tube.
External circuit is not required.
l
OHL
–5 mA
Segment (anode) signal output pins for a VFD tube.
These pins can be directly connected to the VFD tube.
External circuit is not required.
l
OHL
–10 mA
Inverted Grid signal output pins.
For pre-driver, the external circuit is required.
l
OL
10 mA
Chip select input pin.
Data is not transferred when CS is set to a Low level.
Shift clock input pin.
Serial data shifts at the rising edge of the CLOCK.
Serial data input pin (positive logic).
Data is input to the shift register at the rising edge of the CLOCK
signal.
Duplex/Triplex operation select input pin.
Duplex (1/2 duty) operation is selected when this pin is set to V
DD
.
Triplex (1/3 duty) operation is selected when this pin is set to L-GND.
Master/Slave mode select input pin.
Master mode is selected when this pin is set to V
DD
.
Slave mode is selected when this pin is set to L-GND.
Dimming pulse input.
When the slave mode is selected, the pulse width of the all segment
output are controlled by a input pulse width of DIM IN.
Connect this pin to the master side DIM OUT pin at the slave mode.
When the master mode is selected, the input level of this pin is
ignored and the pulse width of the all grids and segment outputs are
controlled by a built-in 10-bit dimming circuit.
Connect this pin to V
DD
or L-GND at the master mode.
SEG1 to 22
O
SEG23 to 32
1 to 8,
54, 55
O
GRID1
to
3
9, 10, 11
O
CS
CLOCK
18
19
I
I
DATA IN
20
I
DUP/TRl
24
I
M/S
25
I
DIM IN
15
I
4/17