FEDL9212-01
OKI Semiconductor
ML9212
Output Timing (Duplex Operation) *1bit time = 4/f
OSC
Solid line : The dimming data is 1016/1024 at the master mode
Dotted line : The dimming data is 64/1024 at the master mode
2048 bit times(1 display cycle)
GRID1
1016 bit times
8 bit times
GRID2
1016 bit times
1016 bit times
8 bit times
8 bit times
V
DISP
D-GND
V
DISP
D-GND
V
DISP
64 bit times
SEG1-32
64 bit times
64 bit times
D-GND
V
DISP
D-GND
V
DD
DIM OUT
L-GND
V
DD
SYNC OUT1
L-GND
V
DD
L-GND
GRID3
SYNC OUT2
Output Timing (Triplex Operation) *1bit time = 4/f
OSC
Solid line : The dimming data is 1016/1024 at the master mode
Dotted line : The dimming data is 64/1024 at the master mode
3072 bit times(1 display cycle)
GRID1
1016 bit times
8 bit times
GRID2
1016 bit times
8 bit times
8 bit times
V
DISP
D-GND
V
DISP
D-GND
GRID3
64 bit times
SEG1-32
D-GND
DIM OUT
V
DD
L-GND
SYNC OUT1
V
DD
L-GND
SYNC OUT2
V
DD
L-GND
64 bit times
1016 bit times
64 bit times
V
DISP
D-GND
V
DISP
9/17
OKI [ OKI ELECTRONIC COMPONETS ]
