FEDL9203-01
1
Semiconductor
ML9203-xx
FUNCTIONAL DESCRIPTION
Commands List
LSB
1st byte
MSB LSB
2nd byte
MSB
Command
B0 B1 B2 B3 B4 B5 B6 B7 B0 B1 B2 B3 B4 B5 B6 B7
1
2
DCRAM_A data write X0 X1 X2 X3
CGRAM_A data write X0 X1 X2 X3
ADRAM_A data write X0 X1 X2 X3
1
0
0
0
C0 C1 C2 C3 C4 C5 C6 C7
C0 C5 C10 C15 C20 C25 C30
C1 C6 C11 C16 C21 C26 C31
C2 C7 C12 C17 C22 C27 C32
C3 C8 C13 C18 C23 C28 C33
C4 C9 C14 C19 C24 C29 C34
*
*
*
*
*
*
2nd byte
3rd byte
4th byte
5th byte
6th byte
0
1
0
0
3
5
1
1
1
0
0
1
0
0
C0
*
*
*
*
*
*
Display duty set
D0 D1
*
*
D2 D3 D4 D5 D6 D7 D8 D9
6
Number of digits set
All lights ON/OFF
K0 K1 K2 K3
0
1
1
0
7
9
L
H
*
*
1
1
1
0
1
0
0
1
DCRAM_B data write X0 X1 X2 X3
CGRAM_B data write X0 X1 X2 X3
ADRAM_B data write X0 X1 X2 X3
C0 C1 C2 C3 C4 C5 C6 C7
C0 C5 C10 C15 C20 C25 C30
C1 C6 C11 C16 C21 C26 C31
C2 C7 C12 C17 C22 C27 C32
C3 C8 C13 C18 C23 C28 C33
C4 C9 C14 C19 C24 C29 C34
*
*
*
*
*
*
2nd byte
3rd byte
4th byte
5th byte
6th byte
A
0
1
0
1
B
F
1
1
1
1
0
1
1
1
C0
*
*
*
*
*
*
Standby mode
*
*
*
*
(Test mode) Note)
*
: Don’t care
Xn : Address specification for each RAM
Cn : Character code specification for each RAM
Dn : Display duty specification
When data is written to RAM (DCRAM, CGRAM, ADRAM)
continuously, addresses are internally incremented
automatically.
Therefore it is not necessary to specify the 1st byte to write
RAM data for the 2nd and later bytes.
Kn : Number of digits specification
H
L
: All lights ON instruction
: All lights OFF instruction
Note: The test mode is used for inspection before shipment.
It is not a user function. The user cannot use this
command. Enter commands 1 to 3, 5 to 7, 9 to B, and
F alone in the way described on the next page and the
following pages. (The operation of this device cannot be
guaranteed if other commands are used.)
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