PEDL9090-02
¡ Semiconductor
ML9090-01,-02
2. Instructions (Data Registers)
• Key scan register (KR)
D7
D6
D5
D4
S4
D3
S3
D2
S2
D1
S1
D0
S0
ST2
ST1
ST0
(1) D7 to D5 ST2 to ST0 (Scan read counter)
When reading 25-bit key scan data, these bits indicate the number of times scan data has been
read. Every time key scan data is read, these bits (ST2 to ST0) are automatically incremented over
the range of “000” to “100”. After counting to “100”, this key scan data read counter is reset to
“000”.
If the RESET pin is pulled to a “L” level, these bits are reset to “0”.
(2) D4 to D0 S4 to S0 (Key scan read data bits)
Thesebitsarereadas25-bitserialdatathatexpressesthekeyswitchstatus(1=ON,0=OFF).Data
is divided into 5 groups and read. (For the read order, refer to the description below.) The read
count is indicated by bits ST2 to ST0. S4 to S0 key scan data corresponds to each SWN0 of the key
matrix shown in figure 1. The relation between the key scan data, key matrix signal and each
SWN0 of the key matrix is shown below.
If the RESET pin is pulled to a “L” level, these bits are reset to “0”.
ST2
ST1
ST0
S4
S3
S2
S1
S0
0
0
0
0
1
0
0
1
1
0
0
1
0
1
0
SW04
SW14
SW24
SW34
SW44
SW03
SW13
SW23
SW33
SW43
SW02
SW12
SW22
SW32
SW42
SW01
SW11
SW21
SW31
SW41
SW00
SW10
SW20
SW30
SW40
R0
R1
R2
R3
R4
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