PEDL9090-02
¡ Semiconductor
ML9090-01,-02
Register Descriptions
This IC is constructed from a start byte register and data registers.
1. Start byte register
D7
"1"
D6
"1"
D5
RS
D4
D3
D2
D1
D0
R/W
Register number
The start byte register selects 8 types of data registers.
(1) D7, D6 (fixed at “1”)
When selecting the start byte register, always write a “1” to bits D7 and D6.
If the RESET pin is pulled to a “L” level, these bits are reset to “0”.
(2) D5 RS (Register Select bit)
1: RAM is selected
0: Register is selected
This bit specifies whether the selected data register is DRAM (display data register) or registers
different from the display data register. To select DRAM, write a “1” to this bit. To select registers
other than DRAM, write a “0” to this bit. If the RESET pin is pulled to a “L” level, this bit is reset
to “0”.
(3) D4 R/W (Read mode, Write mode select bit)
1: Read mode is selected
0: Write mode is selected
This bit specifies either read mode or write mode for the selected data register. To select read
mode, writea“1”tothisbit. Toselectwritemode, writea“0”tothisbit. IftheRESETpinispulled
to a “L” level, this bit is reset to “0”.
(4) D3 to D0 (Register number)
Thesebitsselectthedataregister. Thecorrespondencebetweeneachbitandeachregisterislisted
in the table below. If the RESET pin is pulled to a “L” level, these bits are reset to “0”.
Code
D3
0
D2
0
D1
0
D0
0
Register name
Key scan register
0
1
2
3
4
5
8
9
0
0
0
1
Display data register
X address register
Y address register
Port A register
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
Port B register
1
0
0
0
Control register 1
Control register 2
1
0
0
1
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