¡ Semiconductor
ML9041
Address Counter (ADC)
The address counter provides a read/write address for the DDRAM, ABRAM or CGRAM and
also provides a cursor display address.
When an instruction code specifying DDRAM, ABRAM or CGRAM address setting is input to
the pre–defined register, the register selects the specified DDRAM, ABRAM or CGRAM and
transferstheaddresscodetotheADC. TheaddressdataintheADCisautomaticallyincremented
(or decremented) by 1 after the display data is written in or read from the DDRAM, ABRAM or
CGRAM.
The data in the ADC is output to DB to DB when R/W = “H”, RS = “L”, RS = “H” and BF =
0
6
0
1
“0”.
Timing Generator
The timing generator generates timing signals for the internal operation of the ML9041 activated
by the instruction sent from the CPU or for the operation of the internal circuits of the ML9041
such as DDRAM, ABRAM, CGRAM and CGROM. Timing signals are generated so that the
internal operation carried out for LCD displaying will not be interfered by the internal operation
initiated by accessing from the CPU. For example, when the CPU writes data in the DDRAM,
the display of the LCD not corresponding to the written data is not affected.
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OKI [ OKI ELECTRONIC COMPONETS ]
