¡ Semiconductor
ML9041
FUNCTIONAL DESCRIPTION
Instruction Register (IR), Data Register (DR), and Expansion Instruction Register (ER)
These registers are selected by setting the level of the Register Selection input pins RS and RS .
0
1
The DR is selected when both RS and RS are “H”. The IR is selected when RS0 is “L” and RS
0
1
1
is “H”. The ER is selected when both RS and RS are “L”. (When RS is “H” and RS is “L”, the
0
1
0
1
ML9041 is not selected.)
The IR stores an instruction code and the address code of the display data RAM (DDRAM) or the
character generator RAM (CGRAM).
The microcontroller (CPU) can write to the IR but cannot read from the IR.
The ER stores a contrast adjusting code and the address code of the arbitrator RAM (ABRAM).
The CPU can write to or read from the ER.
The DR stores data to be written in the DDRAM, ABRAM and CGRAM and also stores data read
from the DDRAM, AMRAM and CGRAM.
The data written in the DR by the CPU is automatically written in the DDRAM, ABRAM or
CGRAM.
WhenanaddresscodeiswrittenintheIRorER, thedataofthespecifiedaddressisautomatically
transferredfromtheDDRAM, ABRAMorCGRAMtotheDR. ThedataoftheDDRAM, ABRAM
and CGRAM can be checked by allowing the CPU to read the data stored in the DR.
After the CPU writes data in the DR, the data of the next address in the DDRAM, ABRAM or
CGRAM is selected to be ready for the next writing by the CPU. Similarly, after the CPU reads
the data in the DR, the data of the next address in the DDRAM, ABRAM or CGRAM is set in the
DR to be ready for the next reading by the CPU.
Writing in or reading from these 3 registers is controlled by changing the status of the R/
W(Read/Write) pin.
Table 1 R/W pin status and register operation
R/W
RS0
L
RS1
H
Operation
Writing in the IR
L
H
L
Reading the Busy flag (BF) and the address counter (ADC)
Writing in the DR
L
H
H
H
Reading from the DR
H
L
H
H
Writing in the ER
L
L
Reading the contrast code
H
L
L
Busy Flag (BF)
The status “1” of the Busy Flag (BF) indicates that the ML9041 is carrying out internal operation.
When the BF is “1”, any new instruction is ignored.
When R/W = “H”, RS = “L” and RS = “H”, the data in the BF is output to the DB .
0
1
7
New instructions should be input when the BF is “0”.
When the BF is “1”, the output code of the address counter (ADC) is undefined.
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