FEDL7204-001DIGEST-01
OKI Semiconductor
ML7204-001
Pin
When
PDNB
= “0”
Symbol
PDNB
I/O
I
Description
TQFP100 QFP64
Power-down input
61
42
“0” “0”: Power-down reset
”1”: Normal operation
62
63
—
—
GPIOB[0]
GPIOB[1]
I/O
I/O
I
I
General-purpose I/O port B[0]
General-purpose I/O port B[1]
SYNC/BCLK input-output control input
“0”: SYNC/BCLK are configured to be input
“1”: SYNC/BCLK are configured to be output
General-purpose I/O port B[2]
General-purpose I/O port B[3]
Digital ground (0.0 V)
General-purpose I/O port B[4]
General-purpose I/O port B[5]
64
43
CLKSEL
I
I
65
66
67
68
69
—
—
44
—
—
GPIOB[2]
GPIOB[3]
DGND1
GPIOB[4]
GPIOB[5]
I/O
I/O
—
I/O
I/O
I
I
—
I
I
General-purpose I/O port A[0] [5 V tolerant pin]
Secondary function: Input pin for dial pulse detection
General-purpose I/O port A[1] [5 V tolerant pin]
(Unused)
70
45
GPIOA[0]/DPI
I/O
I
71
72
73
46
—
—
GPIOA[1]
NC
I/O
—
—
I
—
—
NC
(Unused)
GPIOA[2]/DP
O
GPIOA[3]
AVDD
NC
General-purpose I/O port A[2] [5 V tolerant pin]
Secondary function: Output pin for dial pulse transmission
General-purpose I/O port A[3] [5 V tolerant pin]
Analog power supply
(Unused)
AMP0 non-inverting input
74
47
I/O
I
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
48
49
—
50
51
52
—
53
54
—
55
56
57
58
—
—
59
60
—
61
I/O
—
—
I
I
—
—
I
AIN0P
AIN0N
GSX0
NC
GSX1
AIN1N
NC
AVREF
VFRO0
VFRO1
AGND
NC
NC
DGND2
XI
NC
XO
I
I
AMP0 inverted input
O
—
O
I
—
O
O
O
—
—
—
—
I
“Hi-z” AMP0 output (10 kΩ driving)
(Unused)
“Hi-z” AMP1 output (10 kΩ driving)
AMP1 inverted input
(Unused)
“L” Analog signal ground (1.4 V)
“Hi-z” AMP2 output (10 kΩ driving)
“Hi-z” AMP3 output (10 kΩ driving)
—
I
—
—
—
—
—
I
Analog ground (0.0 V)
(Unused)
(Unused)
Digital ground (0.0 V)
12.288 MHz crystal interface, 12.288 MHz clock input
(Unused)
—
O
—
“H” 12.288 MHz crystal interface
8/42
OKI [ OKI ELECTRONIC COMPONETS ]
