FEDL7020-02
1
Semiconductor
ML7020
AC Characteristics (Processor Interface)
(VDD = 4.5 to 5.5 V, Ta = –40 to +85°C)
Parameter
Write signal period
Write signal width
Read signal width
Symbol
PW
Condition
Min.
2000
100
200
10
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
—
60
40
Max.
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TW
—
TR
—
TAW1
TAR1
TAW2
TAR2
TCW1
TCR1
TCW2
TCR2
TDW1
TDW2
tpd1
—
Address data setup time
Address data hold time
Chip select setup time
Chip select hold time
80
—
50
—
10
—
See Figure 5.
10
—
80
—
50
—
10
—
Data setup time
110
20
—
Data hold time
—
Data output delay time
Data output hold time
20
150
100
tpd2
20
A1, A0
CSB
Address
Address
TAR2
TAW2
TAW1
TAR1
TCW2
TCR2
TCR1
TCW1
WRB
RDB
TR
TW
tpd2
TDW2
TDW1
tpd1
Write data
Read data
D0 to D3
Figure 5 Processor interface timing
13/19
OKI [ OKI ELECTRONIC COMPONETS ]
