ML675001/ML67Q5002/ML67Q5003
DC Characteristics
(VDD_CORE = 2.25 to 2.75 V, VDD_IO = 3.0 to 3.6 V, TA = -40 to +85°C) (Continued)
Item
Symbol
Conditions
Minimum
-50
Typical
—
Maximum
Unit
[4]
Input leakage current [3]
IIH/IIL
VI = 0 V to VDD_IO
50
-10
5
µA
[5]
IIL
VI = 0 V, Pull-up resistance of 50 kohm
VI = 0V to AVDD
-200
-5
-73
[6]
II
—
Output leak current, 3-state output in High-
impedance mode[3]
ILO
VO = 0 V to VDD_IO
-50
—
50
µA
Input pin capacitance
CI
—
—
—
—
—
—
—
—
6
9
—
—
—
650
2
pF
pF
pF
µA
Output pin capacitance
CO
—
—
I/O pin capacitance
CIO
IREF
10
320
1
Analog reference power supply current
Analog-to-digital converter enabled [7]
Analog-to-digital converter disabled
[8]
Power Supply Current (STANDBY)
IDDS_CORE
IDDS_IO
IDDH_CORE
IDDH_IO
IDD_CORE
IDD_IO
TA = 25°C
20
10
37
6
150
40
µA
mA
mA
[9]
Power Supply Current (HALT)
fOP = 60 MHz
CL = 30 pF
55
—
—
—
10
Power Supply Current (RUN) [10]
75
17
120
25
1. All output pins except XA[15:0].
2. XA[15:0].
3. The absolute value of leakage current into the device is shown as (+) and current out of the device is shown as (-).
4. All input pins except RESET_N.
5. RESET_N pin, with 50 kΩ pull-up resistance.
6. Analog input pins (AIN0 to AIN3).
7. Analog-Digital Converter operation ratio is 20%.
8.
V
or 0 V for input ports; no load for other pins.
DD_IO
9. DRAM function stopped by deasserting the DRAME_N pin.
10. Cacheable setting and external ROM used.
[1]
Analog-to-Digital Converter Characteristics
(VDD_CORE = 2.5 V, VDD_IO = 3.3 V, AVDD = 3.3 V, TA = 25°C)
Item
Symbol
n
Conditions
Minimum
Typical
Maximum
Unit
Resolution [2]
Linearity error [3]
—
—
—
—
—
—
5
—
3
10
—
—
—
—
—
200
bit
lsb
EL
Analog input source impedance Ri ≤ 1kΩ
Differential linearity error [4]
Zero scale error [5]
Full scale error [6]
Conversion time
ED
3
EZS
3
EFS
3
tCONV
—
—
—
—
µs
Throughput
10
kHz
1.
V
and AVDD should be supplied separately.
DD_IO
2. Resolution: Minimum input analog value recognized. For 10-bit resolution, this is (V – A ) ÷1024.
REF
GND
3. Linearity error: Difference between the theoretical and actual conversion characteristics. (Note that it does not include quantization error.) The theoretical conversion characteristic divides the voltage range between V and A
REF
GND
into 1024 equal steps.
4. Differential linearity error: Difference between the theoretical and actual input voltage change producing a 1-bit change in the digital output anywhere within the conversion range. This is an indicator of conversion characteristic
smoothness. The theoretical value is (V – A ) ÷ 1024.
REF
GND
5. Zero scale error: Difference between the theoretical and actual conversion characteristics at the point where the digital output switches from “0x000” to “0x001.”
6. Full scale error: Difference between the theoretical and actual conversion characteristics at the point where the digital output switches from “0x3FE” to “0x3FF.”
16 • Oki Semiconductor
April 2004, Rev 2.0
OKI [ OKI ELECTRONIC COMPONETS ]
