ML674000
Oki Semiconductor
External Memory Controller
Controls access of externally connected devices such as ROM (FLASH), SRAM, SDRAM (EDO DRAM), and
IO devices.
(1) ROM (FLASH) access function
Supports 16-bit device
Supports FLASH memory:
Access timing setting
Byte write (can be written only by IF equivalent to SRAM).
(2) SRAM access function
Supports 16-bit device
Supports asynchronous SRAM
Access timing setting
(3) DRAM access function
Supports 16-bit device
Supports EDO/SDRAM:
Access timing setting
Simultaneous connections to EDO-DRAM and SDRAM are not supported.
(4) External IO access function
Supports 8-bit/16-bit device
Supports 2 banks independently
Supports external wait input: XWAIT (IO bank 0 only)
Access timing setting (for each bank)
Power Management
HALT and STANDBY functions are supported as power save functions.
(1) HALT mode
HALT object
CPU, internal RAM, AHB bus control
HALT mode setting: Set by the system control register.
HALT mode cancelling: Reset, interrupt
(2) STANDBY mode
Stops the clock of entire MCU.
STANDBY mode setting: Specified by the system control register.
STANDBY mode cancelling: Reset, external interrupt (other than FIQ)
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