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ML2614HB 参数 Datasheet PDF下载

ML2614HB图片预览
型号: ML2614HB
PDF下载: 下载PDF文件 查看货源
内容描述: [ADPCM Codec, 2.5 X 2 MM, 0.50 MM PITCH, WCSP-20]
分类和应用: PC电信电信集成电路
文件页数/大小: 27 页 / 476 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
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ML2612 FAMILY DATASHEET  
Pin Description  
Pin No.  
Pin Name  
IO Power  
Description  
Reset  
state  
Unused  
pin  
QFN WCSP  
Common terminals for all family products  
8
7
12  
10  
A2  
A1  
A5  
A4  
SPOUT-  
SPOUT+  
MCLKI  
PLLC  
O
O
I
HVDD Speaker – output  
HVDD Speaker + output  
HVDD Master clock input  
HVDD Capacitor and resistor connect pin for PLL stable HGND  
operation. Please set following circuit near by pins as  
possible.  
Hi-Z  
Hi-Z  
(input)  
Open  
Open  
-
O
Open  
PLLC pin  
3
9
C1  
A3  
VMID  
O
O
LVDD Capacitor connect pin for Analog reference voltage. LGND  
Please connect 1.0µF capacitor between this pin and  
LGND.  
HVDD Microphone bias voltage output. Please connect HGND  
2.2µF capacitor between this pin and HGND.  
-
MICBIAS  
Open  
14  
13  
19  
18  
21  
B5  
B4  
D5  
C4  
D3  
SAI_LRCLK IO HVDD SAI LR clock input  
(input)  
(input)  
(input)  
L
-
-
-
-
-
SAI_BCLK  
SAI_SDIN  
SAI_SDOUT  
LVDD  
IO HVDD SAI bit clock input/output  
I
O
P
HVDD SAI serial data input  
HVDD SAI serial data output  
-
Low voltage power supply.  
Please connect bypass capacitor between this pin and  
LGND.  
-
22  
5
D2  
B1  
LGND  
HVDD  
P
P
-
-
Low voltage ground  
-
-
-
-
High voltage power supply.  
Please connect bypass capacitor between this pin and  
HGND.  
6
4
B2  
C3  
HGND  
LIN  
P
I
-
High voltage ground  
-
-
LVDD Lin input  
Hi-Z  
Open  
Terminals depends on product  
ML2612GD has all terminals. Some pins are limited according with WCSP products.  
2
C2  
D1  
C2  
D1  
MIN-  
I
LVDD Analog microphone - input  
Apply for ML2612GD and ML2614HB  
LVDD Analog microphone + input  
Apply for ML2612GD and ML2614HB  
HVDD Digital microphone input  
Apply for ML2612GD and ML2616HB  
HVDD Digital microphone data synchronous clock output  
Apply for ML2612GD, and ML2616HB  
HVDD Control interface mode select  
L: 3 wire serial interface H: 2 wire serial interface  
Apply for ML2612GD  
Hi-Z  
Hi-Z  
(input)  
L
Open  
Open  
Open  
Open  
-
24  
1
MIN+  
I
MDIN  
I
23  
16  
MDSCLKO  
O
I
N/A IFSEL  
(input)  
20  
D4  
S3_SDATA  
/S2_SDATA  
IO HVDD 3 or 2 wire serial interface data IO. When 3 wire (input)  
serial is selected, output interface becomes CMOS  
type. When 2 wire serial is selected, output interface  
becomes open drain type. Please use this pin with  
external pull-up resister when 2 wire serial is  
selected. If this pin is used with external pull-up  
resistor, it possibly gets noise from power. Therefore  
tamper noise design is required in the noisy  
environment.  
-
Version: 3  
10