FEDL2500BFULL-02
OKI Semiconductor
ML2500BTA
Timing for Power-down operation with RESET pin
Power-down with RESET pin
Power-up with RESET pin
RESET(I)
tPDWNR
tPWUP
1 ms
Powering Up
100 µs
Command-wait
Status
Power Down
Command-wait
Timing for Record/Playback Operation
1. Timing for Recording Operation
The following chart shows timing for recording operation at 6.4 kHz sampling frequency. It is assumed that the
Start and Stop Addresses are set by the STADR and SPADR commands prior to the REC command input.
Power-up
REC command input
STOP command input
tSPCM
CS(I)
tRECM
tRECR
PDWN command input
MON(O)
tSPCR
RPM
Bit(O)
tPDWN
200 ms(Typ.)
62.5 ms(Typ.)
200 ms(Typ.)
10 ms(Typ.)
Status
Power-down
Command-wait
Erasing
Recording
Command-wait Power-down
Dummy Recording
(Note 1) It takes about 210 ms (Typ.) for the LSI to start actual recording after the REC command input, as the
LSI first erase 1 sector before it can start recording.
(Note 2) When recording is stopped by the STOP command, the LSI continues to record until the last address of
the current page is reached. This “lag” recording time is the STOP command of about 62.5 ms (Typ.). Afterwards,
dummy recording is taken place up to the end of the following sector (max. 2 sectors). This dummy recording
takes about 200 ms (Typ.). The dummy recording is given in the device specification and the recording contents
are undefined.
(Note 3) It is recommended to use the power-down mode in order to reduce power consumption when record or
playback are not performed.
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