FEDL2250DIGEST-09
OKI Semiconductor
ML2250 family
Power Down Function
In power down state, the power down function in the device stops the internal operation and oscillation, sets
AOUT to GND, and minimizes the static Idd.
When an external clock is in use, input “L” level to the XT pin, so that current does not flow into the oscillation
circuit.
Figure below shows the equivalent circuit of ÈÌ and XT pins.
To master clock inside the device
1 M approx.
RESET
XT
XT
Initial state at the reset input
At the reset input, status of each output pins is described in the table below.
Output pin
NCR1
NCR2
Status
“H” level
“H” level
“H” level
“H” level
Output pin
XT
AOUT
DAO
Status
“L” level
“L” level
“L” level
“L” level
Hi-z level
BUSY1
BUSY2
VBG
REGOUT
Channel Status
Channel status is of 2 types: NCRn and ÞËÍDz.
Channel
CH1
Channel status
NCR1
NCR2
BUSY1
BUSY2
CH2
NCRn = “H” indicates that it is possible to input the PLAY, START and MUON commands for the phrase to be
played back next for channel n.
ÞËÍDz = “H” indicates a state in which channel n has not performed voice processing. ÞËÍDz = “L” indicates a
state in which channel n is performing voice processing.
Meanwhile, after a command is input, the NCR and ÞËÍÇ signals of all channels are at “L” level during the
processing of the command.
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