¡ Semiconductor
MD56V62160/H
Mode Set Address Keys
CAS
Latency
A6
0
0
0
0
1
1
1
1
A5
0
0
1
1
0
0
1
1
A4
0
1
0
1
0
1
0
1
CL
Reserved
Reserved
2
3
Reserved
Reserved
Reserved
Reserved
0
1
Burst Type
A3
BT
Sequential
Interleave
A2
0
0
0
0
1
1
1
1
A1
0
0
1
1
0
0
1
1
Burst Length
A0
0
1
0
1
0
1
0
1
BT = 0
2
4
8
BT = 1
2
4
8
Reserved Reserved
Reserved Reserved
Reserved Reserved
Reserved Reserved
Reserved Reserved
Note:
A7, A8, A9, A10, A11, A12 and A13 should stay "L" during mode set cycle.
POWER ON SEQUENCE
1. With inputs in NOP state, turn on the power supply and start the system clock.
2. After the V
CC
voltage has reached the specified level, pause for 200
ms
or more with
the input kept in NOP state.
3. Issue the precharge all bank command.
4. Apply a CBR auto-refresh eight or more times.
5. Enter the mode register setting command.
7/28