¡ Semiconductor
MD56V62160/H
Power Down Mode @ CAS Latency = 2, Burst Length = 4
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CLK
*Note2
tSI
*Note1
tPDE
tSI
tSI
CKE
CS
RAS
CAS
Ra
Ca
ADDR
A13
A12
A10
DQ
Ra
Qa0 Qa1 Qa2
WE
UDQM,
LDQM
Row Active
Clock
Suspention
Exit
Precharge
Command
Power-down
Entry
Power-down
Exit
Clock
Suspention
Entry
Read
Command
*Notes: 1. Whenallbanksareinprechargestate, andifCKEissetlow, thentheMD56V62160/Henterspower-down
mode and maintains the mode while CKE is low.
2. To release the circuit from power-down mode, CKE has to be set high for longer than tPDE (tSI + 1 CLK).
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