TDA6650TT; TDA6651TT
NXP Semiconductors
5 V mixer/oscillator and low noise PLL synthesizer
Table 14. ALBC band selection and charge current setting…continued
LO frequency
Band
Charge pump current
number
184 MHz to 196 MHz
196 MHz to 224 MHz
224 MHz to 296 MHz
296 MHz to 380 MHz
380 MHz to 404 MHz
404 MHz to 448 MHz
448 MHz to 472 MHz
472 MHz to 484 MHz
484 MHz to 604 MHz
604 MHz to 676 MHz
676 MHz to 752 MHz
752 MHz to 868 MHz
868 MHz to 904 MHz
low
7
2
3
4
5
6
7
8
4
5
6
7
8
mid
mid
mid
mid
mid
mid
mid
high
high
high
high
high
8.2 Read mode; R/W = 1
Data can be read from the device by setting the R/W bit to 1 (see Table 15). After the
device address has been recognized, the device generates an acknowledge pulse and the
first data byte (status byte) is transferred on the SDA line (MSB first). Data is valid on the
SDA line during a HIGH level of the SCL clock signal.
A second data byte can be read from the device if the microcontroller generates an
acknowledge on the SDA line (master acknowledge). End of transmission will occur if no
master acknowledge occurs. The device will then release the data line to allow the
microcontroller to generate a STOP condition.
Table 15. I2C-bus read data format
Name
Byte Bit
MSB[1]
ACK
LSB
R/W = 1 A
A0
Address byte 1
Status byte
1
1
0
0
1
0
MA1
A2
MA0
A1
2
POR
FL
ALBC
AGC
-
[1] MSB is transmitted first.
Table 16. Description of read data format bits
Bit
A
Description
acknowledge bit
POR
power-on reset flag
POR = 0, normal operation
POR = 1, power-on reset
in-lock flag
FL
FL = 0, not locked
FL = 1, the PLL is locked
TDA6650TT_6651TT_5
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 05 — 10 January 2007
13 of 54
NXP [ NXP ]
