NXP Semiconductors
P89LPC932A1
8-bit microcontroller with accelerated two-clock 80C51 core
5. Functional diagram
V
DD
V
SS
KBI0
KBI1
KBI2
KBI3
KBI4
KBI5
KBI6
KBI7
CLKOUT
CMP2
CIN2B
CIN2A
CIN1B
CIN1A
CMPREF
CMP1
T1
XTAL2
PORT 0
PORT 1
P89LPC932A1
PORT 3
TXD
RXD
T0
INT0
INT1
RST
OCB
OCC
ICB
OCD
MOSI
MISO
SS
SPICLK
OCA
ICA
SCL
SDA
XTAL1
PORT 2
002aaa890
Fig 2. Functional diagram of P89LPC932A1
6. Pinning information
6.1 Pinning
P2.0/ICB
P2.1/OCD
P0.0/CMP2/KBI0
P1.7/OCC
P1.6/OCB
P1.5/RST
V
SS
P3.1/XTAL1
P3.0/XTAL2/CLKOUT
1
2
3
4
5
6
7
8
9
28 P2.7/ICA
27 P2.6/OCA
26 P0.1/CIN2B/KBI1
25 P0.2/CIN2A/KBI2
24 P0.3/CIN1B/KBI3
23 P0.4/CIN1A/KBI4
22 P0.5/CMPREF/KBI5
21 V
DD
20 P0.6/CMP1/KBI6
19 P0.7/T1/KBI7
18 P1.0/TXD
17 P1.1/RXD
16 P2.5/SPICLK
15 P2.4/SS
002aaa886
P89LPC932A1FDH
P1.4/INT1 10
P1.3/INT0/SDA 11
P1.2/T0/SCL 12
P2.2/MOSI 13
P2.3/MISO 14
Fig 3. P89LPC932A1 TSSOP28 pin configuration
P89LPC932A1_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 March 2007
5 of 64