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P89LPC932A1FDH 参数 Datasheet PDF下载

P89LPC932A1FDH图片预览
型号: P89LPC932A1FDH
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器,带有加速双时钟80C51核心8 KB的3伏字节可擦除闪存, 512字节数据EEPROM [8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 64 页 / 320 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
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P89LPC932A1
8-bit microcontroller with accelerated two-clock 80C51 core
8 kB 3 V byte-erasable flash with 512-byte data EEPROM
Rev. 03 — 12 March 2007
Product data sheet
1. General description
The P89LPC932A1 is a single-chip microcontroller, available in low cost packages, based
on a high performance processor architecture that executes instructions in two to four
clocks, six times the rate of standard 80C51 devices. Many system-level functions have
been incorporated into the P89LPC932A1 in order to reduce component count, board
space, and system cost.
2. Features
2.1 Principal features
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8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages.
Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
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256-byte RAM data memory, 512-byte auxiliary on-chip RAM.
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512-byte customer data EEPROM on chip allows serialization of devices, storage of
set-up parameters, etc.
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Two analog comparators with selectable inputs and reference source.
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Two 16-bit counter/timers (each may be configured to toggle a port output upon timer
overflow or to become a PWM output) and a 23-bit system timer that can also be used
as a RTC.
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Enhanced UART with fractional baud rate generator, break detect, framing error
detection, and automatic address detection; 400 kHz byte-wide I
2
C-bus
communication port and SPI communication port.
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CCU provides PWM, input capture, and output compare functions.
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High-accuracy internal RC oscillator option allows operation without external oscillator
components. The RC oscillator option is selectable and fine tunable.
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2.4 V to 3.6 V V
DD
operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
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28-pin TSSOP, PLCC, HVQFN, and DIP packages with 23 I/O pins minimum and up to
26 I/O pins while using on-chip oscillator and reset options.
2.2 Additional features
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A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns
for all instructions except multiply and divide when executing at 18 MHz. This is six
times the performance of the standard 80C51 running at the same clock frequency. A
lower clock frequency for the same performance results in power savings and reduced
EMI.