Philips Semiconductors
Product data
Low power, low price, low pin count (20 pin)
microcontroller with 4 kbyte OTP
P87LPC764
Name
Description
SFR
Address
Bit Functions and Addresses
MSB
D7
D6
AC
D5
F0
D4
RS1
D3
RS0
D2
OV
D1
F1
LSB
D0
P
Reset
Value
PSW*
PT0AD#
Program status word
Port 0 digital input disable
D0h
F6h
CY
00h
00h
9F
SCON*
SBUF
SADDR#
SADEN#
SP
Serial port control
Serial port data buffer
register
Serial port address register
Serial port address enable
Stack pointer
98h
99h
A9h
B9h
81h
8F
TCON*
TH0
TH1
TL0
TL1
TMOD
WDCON#
WDRST#
Timer 0 and 1 control
Timer 0 high byte
Timer 1 high byte
Timer 0 low byte
Timer 1 low byte
Timer 0 and 1 mode
Watchdog control register
Watchdog reset register
88h
8Ch
8Dh
8Ah
8Bh
89h
A7h
A6h
GATE
–
TF1
SM0
9E
SM1
9D
SM2
9C
REN
9B
TB8
9A
RB8
99
TI
98
RI
00h
xxh
00h
00h
07h
8E
TR1
8D
TF0
8C
TR0
8B
IE1
8A
IT1
89
IE0
88
IT0
00h
00h
00h
00h
00h
C/T
–
M1
M0
GATE
C/T
WDS2
M1
WDS1
M0
WDS0
00h
Note 4
xxh
WDOVF
WDRUN
WDCLK
NOTES:
* SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
1. Unimplemented bits in SFRs are X (unknown) at all times. Ones should not be written to these bits since they may be used for other
purposes in future derivatives. The reset value shown in the table for these bits is 0.
2. I/O port values at reset are determined by the PRHI bit in the UCFG1 configuration byte.
3. The PCON reset value is x x BOF POF–0 0 0 0b. The BOF and POF flags are not affected by reset. The POF flag is set by hardware upon
power up. The BOF flag is set by the occurrence of a brownout reset/interrupt and upon power up.
4. The WDCON reset value is xx11 0000b for a Watchdog reset, xx01 0000b for all other reset causes if the watchdog is enabled, and xx00
0000b for all other reset causes if the watchdog is disabled.
2003 Sep 03
8
PHILIPS [ NXP SEMICONDUCTORS ]
