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LPC54616J512BD100 参数 Datasheet PDF下载

LPC54616J512BD100图片预览
型号: LPC54616J512BD100
PDF下载: 下载PDF文件 查看货源
内容描述: [32-bit ARM Cortex-M4 microcontroller]
分类和应用:
文件页数/大小: 169 页 / 3528 K
品牌: NXP [ NXP ]
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LPC546xx  
NXP Semiconductors  
32-bit ARM Cortex-M4 microcontroller  
Table 4.  
Symbol  
Pin description …continued  
Description  
[2]  
PIO1_30  
C6 A8 182 86  
PU I/O PIO1_30 — General-purpose digital input/output pin.  
I/O FC7_TXD_SCL_MISO_WS — Flexcomm 7: USART  
transmitter, I2C clock, SPI master-in/slave-out data I/O, I2S  
word-select/frame.  
I/O SD_D[7] — SD/MMC data 7.  
I
I
SCT0_GPI7 — Pin input 7 to SCTimer/PWM.  
USB1_OVERCURRENTN — USB1 bus overcurrent indicator  
(active low).  
O
USB1_LEDN — USB1-configured LED indicator (active low).  
I/O EMC_D[14] — External Memory interface data [14].  
PU I/O PIO1_31 — General-purpose digital input/output pin.  
[2]  
PIO1_31  
A3 C5 195 92  
I/O MCLK — MCLK input or output for I2S and/or digital  
microphone.  
R — Reserved.  
O
O
CT0_MAT2 — Match output 2 from Timer 0.  
SCT0_OUT6 — SCTimer/PWM output 6.  
I/O FC8_CTS_SDA_SSEL0 — Flexcomm 8: USART  
clear-to-send, I2C data I/O, SPI Slave Select 0.  
I/O EMC_D[15] — External Memory interface data [15].  
[4]  
PIO2_0/  
ADC0_7  
-
P3 57  
-
PU I/O; PIO2_0/ADC0_7 — General-purpose digital input/output pin.  
AI ADC input channel 7 if the DIGIMODE bit is set to 0 in the  
IOCON register for this pin.  
R — Reserved.  
I/O FC0_RXD_SDA_MOSI — Flexcomm 0: USART receiver, I2C  
data I/O, SPI master-out/slave-in data.  
R — Reserved.  
O
CT1_CAP0 — Capture input 0 to Timer 1.  
[4]  
PIO2_1/  
ADC0_8  
-
P4 58  
-
PU I/O; PIO2_1/ADC0_8 — General-purpose digital input/output pin.  
AI ADC input channel 8 if the DIGIMODE bit is set to 0 in the  
IOCON register for this pin.  
R — Reserved.  
I/O FC0_TXD_SCL_MISO — Flexcomm 0: USART transmitter,  
I2C clock, SPI master-in/slave-out data.  
R — Reserved.  
O
CT1_MAT0 — Match output 0 from Timer 1.  
LPC546xx  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2018. All rights reserved.  
Product data sheet  
Rev. 2.5 — 20 June 2018  
30 of 169  
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