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LPC54616J512BD100 参数 Datasheet PDF下载

LPC54616J512BD100图片预览
型号: LPC54616J512BD100
PDF下载: 下载PDF文件 查看货源
内容描述: [32-bit ARM Cortex-M4 microcontroller]
分类和应用:
文件页数/大小: 169 页 / 3528 K
品牌: NXP [ NXP ]
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LPC546xx  
NXP Semiconductors  
32-bit ARM Cortex-M4 microcontroller  
11. Dynamic characteristics  
11.1 Flash memory  
Table 22. Flash characteristics  
Tamb = 40 C to +105 C, unless otherwise specified. VDD = 1.71 V to 3.6 V  
Symbol Parameter  
Nendu endurance  
Conditions  
Min  
Typ  
Max  
Unit  
[1]  
sector erase/program  
10000  
1000  
-
-
-
-
cycles  
cycles  
page erase/program; page  
in a sector  
tret  
retention time powered  
unpowered  
10  
10  
-
-
-
-
-
years  
years  
ms  
-
ter  
erase time  
page, sector, or multiple  
consecutive sectors  
100  
[2]  
tprog  
programming  
time  
-
1
-
ms  
[1] Number of erase/program cycles.  
[2] Programming times are given for writing 256 bytes from RAM to the flash.  
11.2 EEPROM  
Table 23. EEPROM characteristics  
Tamb = 40 C to +85 C; VDD = 1.71 V to 3.6 V.  
Symbol  
fclk  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
clock frequency  
endurance  
800  
1500  
1600  
kHz  
Nendu  
tret  
100000  
20  
-
-
-
-
cycles  
years  
retention time  
Tamb = 40 C to  
+85 C  
ta  
access time  
read  
-
-
100  
-
-
ns  
erase/program;  
fclk = 1500 kHz  
1.99  
ms  
erase/program;  
fclk = 1600 kHz  
-
1.87  
-
ms  
[1]  
[1]  
[1]  
[1]  
[1]  
twait  
wait time  
read; RPHASE1  
read; RPHASE2  
write; PHASE1  
write; PHASE2  
write; PHASE3  
70  
35  
20  
40  
10  
-
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
[1] See the LPC546xx. user manual, UM10912 on how to program the wait states for the different read  
(RPHASEx) and erase/program phases (PHASEx).  
Remark: EEPROM is not accessible in deep-sleep and deep power-down modes  
LPC546xx  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2018. All rights reserved.  
Product data sheet  
Rev. 2.5 — 20 June 2018  
102 of 169  
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