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LPC54018JBD208 参数 Datasheet PDF下载

LPC54018JBD208图片预览
型号: LPC54018JBD208
PDF下载: 下载PDF文件 查看货源
内容描述: [32-bit ARM Cortex-M4 microcontroller]
分类和应用:
文件页数/大小: 168 页 / 3551 K
品牌: NXP [ NXP ]
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LPC540xx  
NXP Semiconductors  
32-bit ARM Cortex-M4 microcontroller  
Up to 171 General-Purpose Input/Output (GPIO) pins.  
GPIO registers are located on the AHB for fast access. The DMA supports GPIO  
ports.  
Up to eight GPIOs can be selected as Pin Interrupts (PINT), triggered by rising,  
falling or both input edges.  
Two GPIO Grouped Interrupts (GINT) enable an interrupt based on a logical  
(AND/OR) combination of input states.  
Analog peripherals:  
12-bit ADC with 12 input channels and with multiple internal and external trigger  
inputs and sample rates of up to 5.0 MSamples/sec. The ADC supports two  
independent conversion sequences.  
Integrated temperature sensor connected to the ADC.  
DMIC subsystem includes a dual-channel PDM microphone interface with decimators,  
filtering, and hardware voice activity detection. The processed output data can be  
routed directly to an I2S interface if needed.  
Timers:  
Five 32-bit general purpose timers/counters. All five timers support up to four  
capture inputs and four compare outputs, PWM mode, and external count input.  
Specific timer events can be selected to generate DMA requests.  
One SCTimer/PWM with eight input and ten output functions (including capture and  
match). Inputs and outputs can be routed to or from external pins and internally to  
or from selected peripherals. Internally, the SCTimer/PWM supports 16  
match/captures, 16 events, and 16 states.  
32-bit Real-time clock (RTC) with 1 s resolution running in the always-on power  
domain. A timer in the RTC can be used for wake-up from all low power modes  
including deep power-down, with 1 ms resolution.  
Multiple-channel multi-rate 24-bit timer (MRT) for repetitive interrupt generation at  
up to four programmable, fixed rates.  
Windowed Watchdog Timer (WWDT).  
Repetitive Interrupt Timer (RIT) for debug time stamping and for general purpose  
use.  
Security features:  
Secure Hash Algorithm (SHA1/SHA2) module supports boot with dedicated DMA  
controller.  
Clock generation:  
12 MHz internal Free Running Oscillator (FRO). This oscillator provides a  
selectable 48 MHz or 96 MHz output, and a 12 MHz output (divided down from the  
selected higher frequency) that can be used as a system clock. The FRO is  
trimmed to 1 % accuracy over the entire voltage and temperature range.  
Crystal oscillator with an operating range of 1 MHz to 25 MHz.  
Watchdog Oscillator (WDTOSC) with a frequency range of 6 kHz to 1.5 MHz.  
32.768 kHz low-power RTC oscillator.  
System PLL allows CPU operation up to the maximum CPU rate and can run from  
the main oscillator, the internal FRO, the watchdog oscillator or the 32.768 KHz  
RTC oscillator.  
Two additional PLLs for USB clock and audio subsystem.  
Independent clocks for the SPIFI interface, ADC, USBs, and the audio subsystem.  
LPC540xx  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2018. All rights reserved.  
Product data sheet  
Rev. 1.8 — 22 June 2018  
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