LPC540xx
NXP Semiconductors
32-bit ARM Cortex-M4 microcontroller
General-purpose One-Time Programmable (OTP) memory for user application
specific data
ROM API support:
In-Application Programming (IAP) and In-System Programming (ISP).
ROM-based USB drivers (HID, CDC, MSC, and DFU).
Supports serial interface booting (UART, I2C, SPI) from an application processor,
automated booting from NOR flash (quad SPIFI, 8/16/32-bit external parallel flash),
and USB booting (full-speed, high-speed).
FRO API for selecting FRO output frequency.
OTP API for programming OTP memory.
Random Number Generator (RNG) API.
Execute in place (XIP) from SPIFI NOR flash (in quad, dual SPIFI mode or single-bit
SPI mode), and parallel NOR flash.
Serial interfaces:
Flexcomm Interface contains up to 11 serial peripherals. Each Flexcomm Interface
(except flexcomm 10, which is dedicated for SPI) can be selected by software to be
a USART, SPI, or I2C interface. Two Flexcomm Interfaces also include an I2S
interface. Each Flexcomm Interface includes a FIFO that supports USART, SPI,
and I2S if supported by that Flexcomm Interface. A variety of clocking options are
available to each Flexcomm Interface and include a shared fractional baud-rate
generator.
I2C-bus interfaces support Fast-mode and Fast-mode Plus with data rates of up to
1Mbit/s and with multiple address recognition and monitor mode. Two sets of true
I2C pads also support High Speed Mode (3.4 Mbit/s) as a slave.
Two ISO 7816 Smart Card Interfaces with DMA support.
USB 2.0 high-speed host/device controller with on-chip high-speed PHY.
USB 2.0 full-speed host/device controller with on-chip PHY and dedicated DMA
controller supporting crystal-less operation in device mode using software library.
See Technical note TN00033 for more details.
SPIFI with XIP feature uses up to four data lines to access off-chip SPI/DSPI/QSPI
flash memory at a much higher rate than standard SPI or SSP interfaces.
Ethernet MAC with MII/RMII interface with Audio Video Bridging (AVB) support and
dedicated DMA controller.
Two CAN FD modules with dedicated DMA controller.
Digital peripherals:
DMA controller with 32 channels and up to 24 programmable triggers, able to
access all memories and DMA-capable peripherals.
LCD Controller supporting both Super-Twisted Nematic (STN) and Thin-Film
Transistor (TFT) displays. It has a dedicated DMA controller, selectable display
resolution (up to 1024 x 768 pixels), and supports up to 24-bit true-color mode.
External Memory Controller (EMC) provides support for asynchronous static
memory devices such as RAM, ROM and flash, in addition to dynamic memories
such as single data rate SDRAM with an SDRAM clock of up to 100 MHz. EMC bus
width (bit) on TFBGA180, TFBGA100, and LQFP100 packages supports up to 8/16
data line wide static memory.
Secured digital input/output (SD/MMC and SDIO) card interface with DMA support.
CRC engine block can calculate a CRC on supplied data using one of three
standard polynomials with DMA support.
LPC540xx
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© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1.8 — 22 June 2018
2 of 168
NXP [ NXP ]
