NXP Semiconductors
LPC3220/30/40/50
16/32-bit ARM microcontrollers
6. Pinning information
6.1 Pinning
ball A1
index area
1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
002aae398
2
3
4
5
6
7
8
9
10 12 14 16 18
11 13 15 17
Transparent top view
Fig 2.
Table 3.
Pin
Row A
Pin configuration for SOT1048-1 (TFBGA296)
Pin allocation table (TFBGA296)
Pin
Symbol
Pin
A3
Symbol
I2C2_SCL
MS_BS/MAT2[1]
SPI2_DATIO/MOSI1/LCDVD[20]
Symbol
A4
A7
I2S1TX_CLK/MAT3[0]
MS_DIO1/MAT0[1]
A5
A8
I2C1_SCL
MS_DIO0/MAT0[0]
A6
A9
A10 SPI2_DATIN/MISO1/LCDVD[21]/ A11 GPIO_1
GPI_27
A13 GPO_21/U4_TX/LCDVD[3]
A16 GPO_6/LCDVD[18]
Row B
B2
B4
B7
I2S1TX_WS/CAP3[0]
MS_SCLK/MAT2[0]
B5
B8
GPO_20
P0[0]/I2S1RX_CLK
MS_DIO2/MAT0[2]
A14 GPO_15/MCOA1/LCDFP
A12 GPIO_0
A15 GPO_7/LCDVD[2]
B3
B6
B9
GPO_5
I2C1_SDA
SPI1_DATIO/MOSI0/MCI2
B10 SPI2_CLK/SCK1/LCDVD[23]
B13 GPO_13/MCOB1/LCDDCLK
B16 GPI_8/KEY_COL6/
SPI2_BUSY/ENET_RX_DV
Row C
C1
C4
C7
FLASH_RD
USB_ATX_INT
GPI_6/HSTIM_CAP/
ENET_RXD2
B11 GPIO_4/SSEL1/LCDVD[22]
B14 GPO_2/MAT1[0]/LCDVD[0]
B17 n.c.
B12 GPO_12/MCOA2/LCDLE
B15 GPI_19/U4_RX
C2
C5
C8
GPO_19
USB_SE0_ VM/U5_TX
MS_DIO3/MAT0[3]
C3
C6
C9
GPO_0/TST_CLK1
TST_CLK2
SPI1_CLK/SCK0
LPC3220_30_40_50_1
© NXP B.V. 2009. All rights reserved.
Preliminary data sheet
Rev. 01 — 6 February 2009
5 of 73
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