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LPC2368FBD100 参数 Datasheet PDF下载

LPC2368FBD100图片预览
型号: LPC2368FBD100
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片16位/ 32位微控制器;高达512 KB的闪存, ISP / IAP ,以太网, USB 2.0 ,CAN和10位ADC / DAC [Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC]
分类和应用: 闪存微控制器以太网
文件页数/大小: 48 页 / 1084 K
品牌: NXP [ NXP ]
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LPC2364/2366/2368  
Philips Semiconductors  
Fast communication chip  
Table 3.  
Symbol  
Pin description …continued  
Pin  
Type Description  
location  
TDI  
2
I
TDI — Test Data in for JTAG interface.  
TMS  
TRST  
TCK  
3
I
TMS — Test Mode Select for JTAG interface.  
TRST — Test Reset for JTAG interface.  
TCK — Test Clock for JTAG interface.  
RTCK — JTAG interface control signal.  
4
I
5
I
RTCK  
100  
I/O  
Note: LOW on this pin while RESET is LOW enables ETM pins (P2.9:0) to operate as  
Trace port after reset.  
RSTOUT  
RESET  
14  
17  
O
I
RSTOUT — LOW on this pin indicates LPC2364/66/68 being in Reset state.  
External reset input: A LOW on this pin resets the device, causing I/O ports and  
peripherals to take on their default states, and processor execution to begin at address  
0. TTL with hysteresis, 5 V tolerant.  
X1  
22  
23  
16  
18  
I
Input to the oscillator circuit and internal clock generator circuits.  
Output from the oscillator amplifier.  
X2  
O
I
RTCX1  
RTCX2  
VSS  
Input to the RTC oscillator circuit.  
O
I
Output from the RTC oscillator circuit.  
Ground: 0 V reference  
15, 31,  
41, 55,  
72, 97,  
83  
VSSA  
11  
I
I
I
I
Analog Ground: 0 V reference. This should nominally be the same voltage as VSS, but  
should be isolated to minimize noise and error.  
VDD(3V3)  
VDCDC(3V3)  
VDDA  
28, 54,  
71, 96,  
3.3 V Power Supply: This is the power supply voltage for the I/O ports.  
13, 42,  
84  
3.3 V DC-to-DC Power Supply: This is the power supply for the on-chip DC-to-DC  
converter only. If the DC-to-DC is not used, these pins must be unconnected.  
10  
12  
19  
Analog 3.3 V Power Supply: This should be nominally the same voltage as VDD but  
should be isolated to minimize noise and error. This voltage is used to power the ADC  
and DAC.  
VREF  
VBAT  
I
I
ADC Reference: This should be nominally the same voltage as VDD but should be  
isolated to minimize noise and error. Level on this pin is used as a reference for ADC  
and DAC.  
RTC Power Supply: 3.3 V on this pin supplies the power to the RTC.  
7. Functional description  
7.1 Architectural overview  
The LPC2364/66/68 microcontroller consists of an ARM7TDMI-S CPU with emulation  
support, the ARM7 Local Bus for closely coupled, high speed access to the majority of  
on-chip memory, the AMBA Advanced High-performance Bus (AHB) interfacing to high  
speed on-chip peripherals, and the AMBA Advanced Peripheral Bus (APB) for connection  
to other on-chip peripheral functions. The microcontroller permanently configures the  
ARM7TDMI-S processor for little-endian byte order.  
LPC2364_66_68_1  
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.  
Preliminary data sheet  
Rev. 01 — 22 September 2006  
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