LPC2212/2214
NXP Semiconductors
16/32-bit ARM microcontrollers
4. Block diagram
(2)
(2)
TMS
(2)
TDI
(2)
RTCK
(2)
XTAL2
TRST
TCK
TDO
XTAL1
RESET
TEST/DEBUG
INTERFACE
V
V
V
LPC2212
LPC2214
DD(3V3)
DD(1V8)
SS
SYSTEM
FUNCTIONS
PLL
ARM7TDMI-S
system
clock
HIGH-SPEED
VECTORED
INTERRUPT
CONTROLLER
(3)
P0, P1
GPI/O
AHB BRIDGE
48 PINS TOTAL
AMBA Advanced High-performance
Bus (AHB)
ARM7 LOCAL BUS
INTERNAL
INTERNAL
SRAM
FLASH
CONTROLLER
CONTROLLER
AHB
DECODER
(1)
CS[3:0]
A[23:0]
16 kB
SRAM
128/256 kB
FLASH
AHB TO APB
BRIDGE
APB
DIVIDER
(1)
EXTERNAL MEMORY
CONTROLLER
(1)
BLS[3:0]
(1)
OE, WE
(1)
D[31:0]
EXTERNAL
(1)
EINT[3:0]
INTERRUPTS
(1)
SCL
2
I C-BUS SERIAL
INTERFACE
(1)
(1)
(1)
(1)
4 × CAP0
4 × CAP1
4 × MAT0
4 × MAT1
(1)
SDA
CAPTURE/
COMPARE
TIMER 0/TIMER 1
(1)
SCK1
(1)
(3)
MOSI1
MISO1
SSEL1
SPI1/SSP SERIAL
(1)
(1)
INTERFACE
(1)
(1)
AIN[3:0]
AIN[7:4]
A/D CONVERTER
(1)
SCK0
P0[30:27],
P0[25:0]
(1)
(1)
(1)
MOSI0
MISO0
SSEL0
SPI0 SERIAL
INTERFACE
P1[31:16],
P1[1:0]
GENERAL
PURPOSE I/O
P2[31:0]
P3[31:0]
(1)
TXD[1:0]
(1)
UART0/UART1
RXD[1:0]
(1)
(1)
DSR1 , CTS1
RTS1 , DTR1
DCD1 , RI1
,
(1)
PWM[6:1]
PWM0
(1)
(1)
,
(1)
(1)
WATCHDOG
TIMER
SYSTEM CONTROL
REAL-TIME CLOCK
002aad181
(1) Shared with GPIO.
(2) When test/debug interface is used, GPIO/other functions sharing these pins are not available.
(3) SSP interface and high-speed GPIO are available on LPC2212/01 and LPC2214/01 only.
Fig 1. Block diagram
LPC2212_2214_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 3 January 2008
4 of 45
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