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LPC2214FBD144/00 参数 Datasheet PDF下载

LPC2214FBD144/00图片预览
型号: LPC2214FBD144/00
PDF下载: 下载PDF文件 查看货源
内容描述: 16位/ 32位ARM微控制器; 128/256 KB ISP / IAP闪存与10位ADC和外部存储器接口 [16/32-bit ARM microcontrollers; 128/256 kB ISP/IAP flash with 10-bit ADC and external memory interface]
分类和应用: 闪存存储微控制器
文件页数/大小: 45 页 / 197 K
品牌: NXP [ NXP ]
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LPC2212/2214  
NXP Semiconductors  
16/32-bit ARM microcontrollers  
The ARM core has a Debug Communication Channel function built-in. The debug  
communication channel allows a program running on the target to communicate with the  
host debugger or another separate host without stopping the program flow or even  
entering the debug state. The debug communication channel is accessed as a  
co-processor 14 by the program running on the ARM7TDMI-S core. The debug  
communication channel allows the JTAG port to be used for sending and receiving data  
without affecting the normal program flow. The debug communication channel data and  
control registers are mapped in to addresses in the EmbeddedICE logic.  
The JTAG clock (TCK) must be slower than 16 of the CPU clock (CCLK) for the JTAG  
interface to operate.  
6.19.2 Embedded trace macrocell  
Since the LPC2212/2214 have significant amounts of on-chip memory, it is not possible to  
determine how the processor core is operating simply by observing the external pins. The  
Embedded Trace Macrocell (ETM) provides real-time trace capability for deeply  
embedded processor cores. It outputs information about processor execution to the trace  
port.  
The ETM is connected directly to the ARM core and not to the main AMBA system bus. It  
compresses the trace information and exports it through a narrow trace port. An external  
trace port analyzer must capture the trace information under software debugger control.  
Instruction trace (or PC trace) shows the flow of execution of the processor and provides a  
list of all the instructions that were executed. Instruction trace is significantly compressed  
by only broadcasting branch addresses as well as a set of status signals that indicate the  
pipeline status on a cycle by cycle basis. Trace information generation can be controlled  
by selecting the trigger resource. Trigger resources include address comparators,  
counters and sequencers. Since trace information is compressed the software debugger  
requires a static image of the code being executed. Self-modifying code can not be traced  
because of this restriction.  
6.19.3 RealMonitor  
RealMonitor is a configurable software module, developed by ARM Inc., which enables  
real time debug. It is a lightweight debug monitor that runs in the background while users  
debug their foreground application. It communicates with the host using the DCC (Debug  
Communications Channel), which is present in the EmbeddedICE logic. The  
LPC2212/2214 contain a specific configuration of RealMonitor software programmed into  
the on-chip flash memory.  
LPC2212_2214_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 3 January 2008  
25 of 45  
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