NXP Semiconductors
HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
7. Functional description
7.1 Function table
Table 3.
Input
E
L
L
L
L
H
[1]
Function table
Channel on
S2
L
L
H
H
X
S1
L
H
L
H
X
nY0 to nZ
nY1 to nZ
nY2 to nZ
nY3 to nZ
switches off
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V
SS
= 0 V (ground).
Symbol
V
DD
V
EE
I
IK
V
I
I
I/O
I
DD
T
stg
T
amb
P
tot
Parameter
supply voltage
supply voltage
input clamping current
input voltage
input/output current
supply current
storage temperature
ambient temperature
total power dissipation
T
amb
=
40 C
to +125
C
DIP16 package
SO16 package
TSSOP16 package
P
[1]
Conditions
referenced to V
DD
pins Sn and E;
V
I
<
0.5
V or V
I
> V
DD
+ 0.5 V
Min
0.5
18
-
0.5
-
-
65
40
-
-
-
-
Max
+18
+0.5
10
V
DD
+ 0.5
10
50
+150
+125
750
500
500
100
Unit
V
V
mA
V
mA
mA
C
C
mW
mW
mW
mW
power dissipation
per output
To avoid drawing V
DD
current out of terminal Z, when switch current flows into terminals Y, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal Z, no V
DD
current will flow out of terminals Y, and in this case there
is no limit for the voltage drop across the switch, but the voltages at Y and Z may not exceed V
DD
or V
EE
.
For DIP16 package: P
tot
derates linearly with 12 mW/K above 70
C.
For SO16 package: P
tot
derates linearly with 8 mW/K above 70
C.
For SSOP16 package: P
tot
derates linearly with 5.5 mW/K above 60
C.
[2]
HEF4052B
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 8 — 17 November 2011
6 of 22
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