NXP Semiconductors
HEF4053B
Triple single-pole double-throw analog switch
nYn
V
DD
V
DD
from decoder
and enable logic
V
EE
nZ
001aae644
Fig 4.
Schematic diagram (one switch)
6. Pinning information
6.1 Pinning
HEF4053B
2Y1
2Y0
3Y1
3Z
3Y0
E
V
EE
V
SS
1
2
3
4
5
6
7
8
001aae643
16 V
DD
15 2Z
14 1Z
13 1Y1
12 1Y0
11 S1
10 S2
9
S3
1
2
3
4
5
6
7
8
001aaj899
HEF4053B
2Y1
2Y0
3Y1
3Z
3Y0
E
V
EE
V
SS
16 V
DD
15 2Z
14 1Z
13 1Y1
12 1Y0
11 S1
10 S2
9
S3
Fig 5.
Pin configuration for SOT38-4 (DIP16) and
SOT109-1 (SO16)
Fig 6.
Pin configuration for SOT403-1 (TSSOP16)
6.2 Pin description
Table 2.
Symbol
E
V
EE
V
SS
S1, S2, S3
1Y0, 2Y0, 3Y0
1Y1, 2Y1, 3Y1
1Z, 2Z, 3Z
V
DD
Pin description
Pin
6
7
8
11, 10, 9
12, 2, 5
13, 1, 3
14, 15, 4
16
Description
enable input (active LOW)
supply voltage
ground supply voltage
select input
independent input or output
independent input or output
independent output or input
supply voltage
HEF4053B
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 10 — 17 November 2011
3 of 20
PHILIPS [ NXP SEMICONDUCTORS ]
