NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
15.6.4 Transmission error
Any transmission will be aborted if one of the following occurs:
1. The RCTS signal does not become active within the tLOCK time.
2. The PLL falls out of lock after once being set and the SEND bit is still active.
3. The XCO monitor output falls.
If either of these cases occurs the RF output will be turned off; the SEND control bit
will be cleared; and the transmission error status flag, RFEF, will be set. The RFEF bit
triggers an interrupt of the MCU if the RFIEN is set. The RFEF bit is cleared by writing a
logical one to the RFIAK bit.
15.6.5 Supply voltage check during RF transmission
A separate low voltage detector can be enabled during the RF transmission and a status
bit checked for low voltage drops due to a weak battery during the higher transmission
currents. This RF LVD can be enabled by setting the RFLVDEN bit and the resulting
status is reported on the RFVF bit. The RFVF bit can be cleared by writing a logical one
to the RFIAK bit if the supply voltage has risen above the detect threshold. Further, if the
voltage falls far enough for the VCO and PLL to fall out-of-lock, then the RF output will be
turned off and the transmission will be terminated.
15.6.6 RF Reset (RFMRST)
The RF state machine, crystal oscillator, PLL and VCO can be reset to the initial off state
by the RFMRST signal generated by one of the following methods:
1. Internal RFM power-on reset (RFPOR).
2. Writing a one to the RFMRST bit in the RFCR7.
Any of these reset methods will not alter any data stored in the data buffer.
15.7 RF interrupt
The RFM will interrupt the MCU when the SEND bit is cleared at the end of a data buffer
transmission. This interrupt occurs at the end of a programmed set of frames. If the
number of frame count FNUM[3:0] is set to zero, then only one frame is sent and the
interrupt occurs at the end of that first frame transmitted. If the number of the frame count
is greater than zero, then the interrupt will be generated depending on the state of the
IFID bit.
The interrupt will also create a flag bit, RFIF, which can be cleared by writing a logical
one to the RFIAK bit. The interrupt can be enabled/disabled by the RFIEN bit.
15.8 Datagram transmission times
In order to comply with FCC requirements in the US market the periodically transmitted
datagram must be less than 1 second in length and be separated by an off time that is
at least 10 seconds or at least 30 times longer than the transmission time, whichever
is longer. The user software must adhere to this ruling for products intended for the US
market.
FXTH87ERM
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© NXP B.V. 2019. All rights reserved.
Reference manual
Rev. 5.0 — 4 February 2019
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