NXP Semiconductors
74LVC1G99
Ultra-configurable multiple function gate; 3-state
7.1 Logic configurations
Table 5.
Function selection table
Complementary function
Primary function
3-state buffer
3-state inverter
3-state 2-input multiplexer
3-state 2-input multiplexer with inverting output
3-state 2-input AND
3-state 2-input AND with one inverting input
3-state 2-input AND with two inverting inputs
3-state 2-input NAND
3-state 2-input NAND with one inverting input
3-state 2-input NAND with two inverting inputs
3-state 2-input XOR
3-state 2-input XNOR
3-state 2-input XOR with one inverting input
3-state 2-input NOR with two inverting inputs
3-state 2-input NOR with one inverting input
3-state 2-input NOR
3-state 2-input OR with two inverting inputs
3-state 2-input OR with one inverting input
3-state 2-input OR
7.2 3-state buffer functions available
Table 6.
Function table
See
Function
3-state buffer
Input
OE
L
L
L
L
L
L
L
[1]
H = HIGH voltage level;
L = LOW voltage level.
A
input
H or L
L
H
H
H or L
L
B
H or L
input
H
L
H or L
L
L
C
L
H
input
input
L
H
H or L
D
L
L
L
H
input
input
input
OE
input
Y
001aah326
Fig 5. 3-state buffer function
74LVC1G99_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 3 January 2008
5 of 26
PHILIPS [ NXP SEMICONDUCTORS ]
