NXP Semiconductors
74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
6.2 Pin description
Table 2.
Symbol
E
V
EE
GND
S1, S2, S3
1Y0, 2Y0, 3Y0
1Y1, 2Y1, 3Y1
1Z, 2Z, 3Z
V
CC
Pin description
Pin
6
7
8
11, 10, 9
12, 2, 5
13, 1, 3
14, 15, 4
16
Description
enable input (active LOW)
supply voltage
ground supply voltage
select input
independent input or output
independent input or output
common output or input
supply voltage
7. Functional description
Table 3.
Inputs
E
L
L
H
[1]
Function table
Channel on
Sn
L
H
X
nY0 to nZ
nY1 to nZ
switches off
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V
SS
= 0 V (ground).
Symbol
V
CC
I
IK
I
SK
I
SW
I
EE
I
CC
I
GND
T
stg
P
tot
Parameter
supply voltage
input clamping current
switch clamping current
switch current
supply current
supply current
ground current
storage temperature
total power dissipation
DIP16 package
SO16, (T)SSOP16, and
DHVQFN16 package
P
[1]
Conditions
Min
0.5
-
-
-
-
-
-
65
-
-
-
Max
+11.0
20
20
25
20
50
50
+150
750
500
100
Unit
V
mA
mA
mA
mA
mA
mA
C
mW
mW
mW
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
SW
<
0.5
V or V
SW
> V
CC
+ 0.5 V
0.5
V < V
SW
< V
CC
+ 0.5 V
power dissipation
per switch
To avoid drawing V
CC
current out of terminal nZ, when switch current flows into terminals nYn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no V
CC
current will flow out of terminals nYn, and in this case
there is no limit for the voltage drop across the switch, but the voltages at nYn and nZ may not exceed V
CC
or V
EE
.
For DIP16 packages: above 70
C
the value of P
tot
derates linearly with 12 mW/K.
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
[2]
74HC_HCT4053
Product data sheet
Rev. 7 — 13 December 2011
5 of 32
PHILIPS [ NXP SEMICONDUCTORS ]
