74HC11; 74HCT11
Triple 3-input AND gate
Rev. 04 — 25 March 2010
Product data sheet
1. General description
The 74HC11; 74HCT11 are high-speed Si-gate CMOS devices that comply with JEDEC
standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL).
The 74HC11; 74HCT11 provides a triple 3-input AND function.
2. Features
Input levels:
For 74HC11: CMOS level
For 74HCT11: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2 000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from
−40 °C
to +85
°C
and from
−40 °C
to +125
°C
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74HC11N
74HCT11N
74HC11D
74HCT11D
74HC11DB
74HCT11DB
74HC11PW
74HCT11PW
−40 °C
to +125
°C
TSSOP14
−40 °C
to +125
°C
SSOP14
−40 °C
to +125
°C
SO14
plastic small outline package; 14 leads; body width
3.9 mm
plastic shrink small outline package; 14 leads; body
width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT108-1
SOT337-1
SOT402-1
−40 °C
to +125
°C
Name
DIP14
Description
plastic dual in-line package; 14 leads (300 mil)
Version
SOT27-1
Type number
PHILIPS [ NXP SEMICONDUCTORS ]
