Nano100(A)
Pin No.
Pin
Type
Pin Name
Description
LQFP LQFP LQFP
QFN
33
100
64
48
Digital GPIO pin
PB.7
I/O
User program must enable pull-up resistor in LQFP48
package.
22
13
CTSn1
nCS
I
O
I/O
P
UART1 Clear to Send input pin
EBI chip select enable output pin
SPI2 1st MOSI (Master Out, Slave In) pin
LDO output pin
MOSI20
LDO
23
24
25
14
15
16
10
11
12
6
7
8
VDD
P
Power supply for I/O ports and LDO source
Ground
VSS
P
Digital GPIO pin
26
27
PE.8
PE.7
I/O
I/O
User program must enable pull-up resistor in LQFP64
and LQFP48 package.
Digital GPIO pin
User program must enable pull-up resistor in LQFP64
and LQFP48 package.
28
29
30
31
17
18
19
20
13
14
15
16
9
VBUS
VDD33
D-
USB POWER SUPPLY: From USB Host or HUB.
USB Internal Power Regulator Output 3.3V Decoupling Pin
USB USB Differential Signal D-
10
11
12
D+
USB USB Differential Signal D+
PB.0
I/O
I
Digital GPIO pin
32
33
21
22
17
18
RX0
UART0 Data receiver input pin
SPI1 1st MOSI (Master Out, Slave In) pin
Digital GPIO pin
MOSI10
PB.1
I/O
I/O
O
TX0
UART0 Data transmitter output pin
SPI1 1st MISO (Master In, Slave Out) pin
Digital GPIO pin
MISO10
PB.2
I/O
I/O
O
RTSn0
nWRL
SPICLK1
PB.3
UART0 Request to Send output pin
EBI low byte write enable output pin
SPI1 serial clock pin
34
35
23
24
19
20
O
O
I/O
I
Digital GPIO pin
CTSn0
nWRH
SPISS10
UART0 Clear to Send input pin
EBI high byte write enable output pin
SPI1 1st slave select pin
O
O
Mar 31, 2015
Page 42 of 95
Revision V1.00
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