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M58LT256JST 参数 Datasheet PDF下载

M58LT256JST图片预览
型号: M58LT256JST
PDF下载: 下载PDF文件 查看货源
内容描述: 256兆位( Mb的16 】 16 ,多银行,多层次,突发) 1.8 V电源供电,安全闪存 [256 Mbit (16 Mb 】 16, multiple bank, multilevel, burst) 1.8 V supply, secure Flash memories]
分类和应用: 闪存
文件页数/大小: 108 页 / 1965 K
品牌: NUMONYX [ NUMONYX B.V ]
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M58LT256JST, M58LT256JSB  
Status Register  
5.3  
Erase/blank check status bit (SR5)  
The erase/blank check status bit identifies if there was an error during a block erase  
operation. When the erase/blank check status bit is High (set to ‘1’), the Program/Erase  
Controller has applied the maximum number of pulses to the block and still failed to verify  
that it has erased correctly.  
The erase/blank check status bit should be read once the Program/Erase Controller status  
bit is High (Program/Erase Controller inactive).  
The erase/blank check status bit also indicates whether an error occurred during the Blank  
Check operation. If the data at one or more locations in the block where the Blank Check  
command has been issued is different from FFFFh, SR5 is set to '1'.  
Once set High, the erase/blank check status bit must be set Low by a Clear Status Register  
command or a hardware reset before a new erase command is issued, otherwise, the new  
command appears to fail.  
5.4  
Program status bit (SR4)  
The program status bit is used to identify if there was an error during a program operation.  
The program status bit should be read once the Program/Erase Controller status bit is High  
(Program/Erase Controller inactive).  
When the program status bit is High (set to ‘1’), the Program/Erase Controller has applied  
the maximum number of pulses to the word and still failed to verify that it has programmed  
correctly.  
Once set High, the program status bit must be set Low by a Clear Status Register command  
or a hardware reset before a new program command is issued; otherwise, the new  
command appears to fail.  
5.5  
VPP status bit (SR3)  
The V status bit identifies an invalid voltage on the V pin during program and erase  
PP  
PP  
operations. The V pin is only sampled at the beginning of a program or erase operation.  
PP  
Program and erase operations are not guaranteed if V becomes invalid during an  
PP  
operation.  
When the V status bit is Low (set to ‘0’), the voltage on the V pin was sampled at a valid  
PP  
PP  
voltage.  
When the V status bit is High (set to ‘1’), the V pin has a voltage that is below the V  
PP  
PP  
PP  
lockout voltage, V  
, the memory is protected and program and erase operations cannot  
PPLK  
be performed.  
Once set High, the V status bit must be set Low by a Clear Status Register command or a  
PP  
hardware reset before a new program or erase command is issued; otherwise, the new  
command appears to fail.  
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